54ABT16646
16-Bit Transceivers and Registers with TRI-STATE
®
Outputs
General Description
The ’ABT16646 consists of bus transceiver circuits with
TRI-STATE, D-type flip-flops, and control circuitry arranged
for multiplexed transmission of data directly from the input
bus or from the internal registers. Data on the A or B bus will
be clocked into the registers as the appropriate clock pin
goes to a high logic level. Control OE and direction pins are
provided to control the transceiver function. In the trans-
ceiver mode, data present at the high impedance port may
be stored in either the A or the B register or in both. The
select controls can multiplex stored and real-time (transpar-
ent mode) data. The direction control determines which bus
will receive data when the enable control OE is Active LOW.
In the isolation mode (control OE HIGH), A data may be
stored in the B register and/or B data may be stored in the A
register.
Features
n Independent registers for A and B buses
n Multiplexed real-time and stored data
n A and B output sink capability of 48 mA, source
capability of 24 mA
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Standard Microcircuit Drawing (SMD) 5962-9450202
Ordering Code
Military Package Package Description
Number
54ABT16646W-QML WA56A 56-Lead Cerpack
Logic Symbol
Pin Names Description
A
0
–A
15
Data Register A Inputs/
TRI-STATE Outputs
B
0
–B
15
Data Register B Inputs/
TRI-STATE Outputs
CPAB
n
, CPBA
n
Clock Pulse Inputs
SAB
n
, SBA
n
Select Inputs
OE
n
Output Enable Input
DIR Direction Control Input
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
DS100226-1
July 1998
54ABT16646
16-Bit
T
ransceivers
and
Registers
with
TRI-ST
A
T
E
Outputs
© 2004 National Semiconductor Corporation DS100226 www.national.com