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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

54122

器件描述:Retriggerable Resettable Multivibrator
器件厂商:NSC [National Semiconductor]
文件大小:125.78KB,共6页
Sponsor by e络盟
器件资料摘要:
TL/F/10212
54122/DM74122
Retriggerable
Resettable
Multivibrator
June 1989
54122/DM74122
Retriggerable Resettable Multivibrator
General Description
The ’122 features positive and negative DC level triggering
inputs, complementary outputs, an optional 10 kX internal
timing resistor and an overriding Direct Clear (C
D
) input.
When the circuit is in the quasi-stable (delay) state, another
trigger applied to the inputs (per Truth Table) will cause the
delay period to start again, without disturbing the outputs.
This process can be repeated indefinitely and thus the out-
put pulse period (Q HIGH, Q LOW) can be made as long as
desired. Alternatively, a delay period can be terminated
by a LOW signal applied to C
D
, which also prevents trigger-
ing. An internal connection from C
D
to the input gate makes
it possible to trigger the circuit by a positive-going signal on
C
D
, as shown in the Truth Table. For timing capacitor values
greater than 1000 pF, the output pulse width is defined as
follows:
t
w
e 0.32 R
X
C
X
(1.0 a 0.7/R
X
)
Where t
w
is in ns, R
X
is in kX and C
X
is in pF.
Connection Diagram
Dual-In-Line Package
TL/F/10212–1
Order Number 54122DMQB, 54122FMQB or DM74122N
See NS Package Number J14A, N14A or W14B
Logic Symbol
TL/F/10212–2
V
CC
e Pin 14
GND e Pin 7
NC e Pins 10 and 12
Pin Names Description
A
1
,A
2
Trigger Inputs (Active Falling Edge)
B
1
,B
2
Trigger Inputs (Active Rising Edge)
C
D
Direct Clear Inputs (Active LOW)
Q, Q Outputs
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.