Philips Semiconductors Product specification
Thyristor 2N5064
sensitive gate
GENERAL DESCRIPTION QUICK REFERENCE DATA
Glass passivated sensitive gate SYMBOL PARAMETER MAX. UNIT
thyristor in a plastic envelope,
intended for use in general purpose V
DRM
, Repetitive peak off-state voltages 200 V
switching and phase control V
RRM
applications. This device is intended I
T(AV)
Average on-state current 0.5 A
to be interfaced directly to I
T(RMS)
RMS on-state current 0.8 A
microcontrollers, logic integreated I
TSM
Non-repetitive peak on-state current 10 A
circuits and other low power gate
trigger circuits.
PINNING - TO92 variant PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 anode
2 gate
3 cathode
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DRM
, V
RRM
Repetitive peak off-state - 200 V
voltages
I
T(AV)
Average on-state current half sine wave
T
c
≤ 67 ˚C - 0.51 A
T
c
≤ 102 ˚C - 0.255 A
I
T(RMS)
RMS on-state current all conduction angles - 0.8 A
I
TRM
Repetitive peak on-state - 8 A
current
I
TSM
Non-repetitive peak half sine wave; T
a
= 25 ˚C prior to surge; - 10 A
on-state current t = 8.3 ms
I
2
tI
2
t for fusing t = 8.3 ms - 0.4 A
2
s
I
GM
Peak gate current T
a
= 25˚C, t
p
= 300µs; f = 120 Hz - 1 A
V
GM
Peak gate voltage - 5 V
V
RGM
Peak reverse gate voltage - 5 V
P
GM
Peak gate power T
a
= 25˚C - 0.1 W
P
G(AV)
Average gate power T
a
= 25˚C, over any 16 ms period - 0.01 W
T
stg
Storage temperature -65 150 ˚C
T
j
Operating junction -65 125 ˚C
temperature
ak
g
321
October 1997 1 Rev 1.200