© 1999 Fairchild Semiconductor Corporation DS009606 www.fairchildsemi.com
April 1988
Revised August 1999
2
9F52
•29F53 8-Bi
t Regi
ster
ed
T
r
anscei
ver
29F52•29F53
8-Bit Registered Transceiver
General Description
The 29F52 and 29F53 are 8-bit registered transceivers.
Two 8-bit back to back registers store data flowing in both
directions between two bidirectional buses. Separate clock,
clock enable and 3-STATE output enable signals are pro-
vided for each register. The A
0
–A
7
output pins are guaran-
teed to sink 24 mA while the B
0
–B
7
output pins are
designed for 64 mA.
The 29F53 is an inverting option of the 29F52. Both trans-
ceivers are AMD Am2952/2953 functional equivalents.
Features
a73 8-bit registered transceivers
a73 Separate clock, clock enable and 3-STATE output
enable provided for each register
a73 AMD Am2952/2953 functional equivalents
a73 Both inverting and non-inverting options available
a73 24-Pin slimline package

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
29F52
IEEE/IEC
29F52
29F53
IEEE/IEC
29F53
Order Number Package Number Package Description
29F52SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
29F52SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
29F53SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide