ST24C04, ST25C04
ST24W04, ST25W04
4 Kbit Serial I
2
C Bus EEPROM
with User-Defined Block Write Protection
February 1999 1/16
AI00851E
2
E1-E2 SDA
V
CC
ST24x04
ST25x04
MODE/WC*
SCL
V
SS
PRE
Figure 1. Logic Diagram
1 MILLION ERASE/WRITE CYCLES with
40 YEARS DATA RETENTION
SINGLE SUPPLY VOLTAGE:
– 3V to 5.5V for ST24x04 versions
– 2.5V to 5.5V for ST25x04 versions
HARDWARE WRITE CONTROL VERSIONS:
ST24W04 and ST25W04
PROGRAMMABLE WRITE PROTECTION
TWO WIRE SERIAL INTERFACE, FULLY I
2
C
BUS COMPATIBLE
BYTE and MULTIBYTE WRITE (up to 4
BYTES)
PAGE WRITE (up to 8 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
DESCRIPTION
This specification covers a range of 4 Kbits I
2
C bus
EEPROM products, the ST24/25C04 and the
ST24/25W04. In the text, products are referred to
as ST24/25x04, where "x" is: "C" for Standard
version and "W" for hardware Write Control ver-
sion.
PRE Write Protect Enable
E1-E2 Chip Enable Inputs
SDA Serial Data Address Input/Output
SCL Serial Clock
MODE
Multibyte/Page Write Mode
(C version)
WC Write Control (W version)
VCC Supply Voltage
V
SS
Ground
Table 1. Signal Names
8
1
SO8 (M)
150mil Width
8
1
PSDIP8 (B)
0.25mm Frame
Note: WC signal is only available for ST24/25W04 products.