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器件描述:Three-PLL Clock Generator IC
器件厂商:ETC [ETC]
厂商主页:
文件大小:59.11KB
文件页数:7
PDF阅读:11825-808.pdf (点击阅读器件资料)
摘要:
AMERICAN MICROSYSTEMS, INC. July 2000 7.11.00 FS6322-05 Three-PLL Clock Generator IC ISO9001 1.0 Features ? Three PLLs with deep reference, feedback, and post dividers to provide precision clock frequencies ? Multiple outputs provide several clocking options ? Outputs may be tristated for board testing ? S0, S1, and S2 inputs modify output frequencies for design flexibility ? 3.3V operation ? Accepts 5 to 30MHz crystals (see Frequency Table for specific reference frequencies required) ? Custom frequency patterns, pinouts, and packages are available. Contact your local AMI Sales Repre- sentative for more information. 2.0 Description The FS6322 is a ROM-based CMOS clock generator IC designed to minimize cost and component count in a va- riety of electronic systems. Three low-jitter phase-locked loops (PLLs) drive up to five low-skew clock outputs to provide a high degree of flexi- bility. The device is packaged in a 16-pin SOIC to mini- mize board space. High-resolution divider capability permits generation of desired frequencies. Figure 1: Pin Configuration 1 16 2 3 4 5 6 7 8 15 14 13 12 11 10 9 CLK_C VDD VSS XIN XOUT/REFIN CLK_E CLK_D CLK_F CLK_B CLK_A VSS S0 S1 VDD S2 OE F S 63 22 16-pin (0.150”) SOIC Figure 2: Block Diagram FS6322-05 Crystal Oscillator XOUT XIN PLL A PLL B PLL C Clock Logic CLK_E CLK_F CLK_A CLK_B CLK_C CLK_D S2:S0 OE Device Control
相关器件:FS6322-05 11825-818
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