100370
Low Power Universal Demultiplexer/Decoder
General Description
The 100370 universal demultiplexer/decoder functions as ei-
ther a dual 1-of-4 decoder or as a single 1-of-8 decoder, de-
pending on the signal applied to the Mode Control (M) input.
In the dual mode, each half has a pair of active-LOW Enable
(E) inputs. Pin assignments for the E inputs are such that in
the 1-of-8 mode they can easily be tied together in pairs to
provide two active-LOW enables (E
1a
to E
1b
,E
2a
to E
2b
).
Signals applied to auxiliary inputs H
a
,H
b
and H
c
determine
whether the outputs are active HIGH or active LOW. In the
dual 1-of-4 mode the Address inputs are A
0a
,A
1a
and A
0b
,
A
1b
with A
2a
unused (i.e., left open, tied to V
EE
or with LOW
signal applied). In the 1-of-8 mode, the Address inputs are
A
0a
,A
1a
,A
2a
with A
0b
and A
1b
LOW or open. All inputs have
50 kΩ pulldown resistors.
Features
n 35% power reduction of the 100170
n 2000V ESD protection
n Pin/function compatible with 100170
n Voltage compensated operating range = −4.2V to −5.7V
Logic Symbols
Pin Names Description
A
na
,A
nb
Address Inputs
E
na
,E
nb
Enable Inputs
M Mode Control Input
H
a
Z
0
–Z
3
(Z
0a
–Z
3a
)
Polarity Select Input
H
b
Z
4
–Z
7
(Z
0b
–Z
3b
)
Polarity Select Input
H
c
Common Polarity
Select Input
Z
0
–Z
7
Single 1-of-8
Data Outputs
Z
na
,Z
nb
Dual 1-of-4
Data Outputs
Single 1-of 8 Application
DS100311-1
Dual 1-of-4 Application
DS100311-4
August 1998
100370
Low
Power
Universal
Demultiplexer/Decoder
© 1998 National Semiconductor Corporation DS100311 www.national.com