100354PC
器件描述：Low Power 8-Bit Register with Cut-Off Drivers
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：91.33KB，共9页
Sponsor by e络盟器件资料摘要：
© 2000 Fairchild Semiconductor Corporation DS010610 www.fairchildsemi.com
October 1989
Revised August 2000
1
00354 Low
Power 8-Bi
t Regis
t
er
wit
h
C
u
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-
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f
f
Dri
vers
100354
Low Power 8-Bit Register with Cut-Off Drivers
General Description
The 100354 contains eight D-type edge triggered, master/
slave flip-flops with individual inputs (D
n
), true outputs (Q
n
),
a clock input (CP), an output enable pin (OEN), and a com-
mon clock enable pin (CEN). Data enters the master when
CP is LOW and transfers to the slave when CP goes HIGH.
When the CEN input goes HIGH it overrides all other
inputs, disables the clock, and the Q outputs maintain the
last state.
A Q output follows its D input when the OEN pin is LOW. A
HIGH on OEN holds the outputs in a cut-off state. The cut-
off state is designed to be more negative than a normal
ECL LOW level. This allows the output emitter-followers to
turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance
reduces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100354 outputs are designed to drive a doubly termi-
nated 50Ω transmission line (25Ω load impedance). All
inputs have 50 kΩ pull-down resistors.
Features
a73 Cut-off drivers
a73 Drives 25Ω load
a73 Low power operation
a73 2000V ESD protection
a73 Voltage compensated operating range = −4.2V to −5.7V
a73 Available to industrial grade temperature range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagrams
24-Pin DIP
28-Pin PLCC
Order Number Package Number Package Description
100354PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100354QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100354QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Pin Names Description
D
0
–D
7
Data Inputs
CEN Clock Enable Input
CP Clock Input (Active Rising Edge)
OEN Output Enable Input
Q
0
–Q
7
Data Outputs
October 1989
Revised August 2000
1
00354 Low
Power 8-Bi
t Regis
t
er
wit
h
C
u
t
-
O
f
f
Dri
vers
100354
Low Power 8-Bit Register with Cut-Off Drivers
General Description
The 100354 contains eight D-type edge triggered, master/
slave flip-flops with individual inputs (D
n
), true outputs (Q
n
),
a clock input (CP), an output enable pin (OEN), and a com-
mon clock enable pin (CEN). Data enters the master when
CP is LOW and transfers to the slave when CP goes HIGH.
When the CEN input goes HIGH it overrides all other
inputs, disables the clock, and the Q outputs maintain the
last state.
A Q output follows its D input when the OEN pin is LOW. A
HIGH on OEN holds the outputs in a cut-off state. The cut-
off state is designed to be more negative than a normal
ECL LOW level. This allows the output emitter-followers to
turn off when the termination supply is −2.0V, presenting a
high impedance to the data bus. This high impedance
reduces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100354 outputs are designed to drive a doubly termi-
nated 50Ω transmission line (25Ω load impedance). All
inputs have 50 kΩ pull-down resistors.
Features
a73 Cut-off drivers
a73 Drives 25Ω load
a73 Low power operation
a73 2000V ESD protection
a73 Voltage compensated operating range = −4.2V to −5.7V
a73 Available to industrial grade temperature range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagrams
24-Pin DIP
28-Pin PLCC
Order Number Package Number Package Description
100354PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100354QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100354QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Pin Names Description
D
0
–D
7
Data Inputs
CEN Clock Enable Input
CP Clock Input (Active Rising Edge)
OEN Output Enable Input
Q
0
–Q
7
Data Outputs