100324
Low Power Hex TTL-to-ECL Translator
General Description
The 100324 is a hex translator, designed to convert TTL
logic levels to 100K ECL logic levels. The inputs are compat-
ible with standard or Schottky TTL. A common Enable (E),
when LOW, holds all inverting outputs HIGH and holds all
true outputs LOW. The differential outputs allow each circuit
to be used as an inverting/non-inverting translator, or as a
differential line driver. The output levels are voltage compen-
sated over the full −4.2V to −5.7V range.
When the circuit is used in the differential mode, the 100324,
due to its high common mode rejection, overcomes voltage
gradients between the TTL and ECL ground systems. The
V
EE
and V
TTL
power may be applied in either order.
The 100324 is pin and function compatible with the 100124
with similar AC performance, but features power dissipation
roughly half of the 100124 to ease system cooling require-
ments.
Features
n Pin/function compatible with 100124
n Meets 100124 AC specifications
n 50% power reduction of the 100124
n Differential outputs
n 2000V ESD protection
n −4.2V to −5.7V operating range
n Standard Microcircuit Drawing
(SMD) 5962-9153001
Logic Diagram
Pin Names Description
D
0
–D
5
Data Inputs
E Enable Input
Q
0
–Q
5
Data Outputs
Q
0
–Q
5
Complementary
Data Outputs
DS100313-4
August 1998
100324
Low
Power
Hex
TTL-to-ECL
T
ranslator
© 1998 National Semiconductor Corporation DS100313 www.national.com