© 1999 Fairchild Semiconductor Corporation DS010648 www.fairchildsemi.com
February 1990
Revised November 1999
1
0031
1 Low
Skew
1
:
9 Dif
f
er
enti
al

Clo
ck
Dr
iver
100311
Low Skew 1:9 Differential Clock Driver
General Description
The 100311 contains nine low skew differential drivers,
designed for generation of multiple, minimum skew differ-
ential clocks from a single differential input (CLKIN,
CLKIN). If a single-ended input is desired, the V
BB
output
pin may be used to drive the remaining input line. A HIGH
on the enable pin (EN) will force a LOW on all of the CLK
n
outputs and a HIGH on all of the CLK
n
output pins. The
100311 is ideal for distributing a signal throughout a system
without worrying about the original signal becoming too
corrupted by undesirable delays and skew.
Features
a73 Low output-to-output skew
a73 2000V ESD protection
a73 1:9 low skew clock driver
a73 Differential inputs and outputs
a73 Available to industrial grade temperature range
(PLCC package only)

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
28-Pin PLCC
Truth Table
Order Number Package Number Package Description
100311QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100311QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Pin Names Description
CLKIN, CLKIN Differential Clock Inputs
EN Enable
CLK
0–8
, CLK
0–8
Differential Clock Outputs
V
BB
V
BB
Output
NC No Connect
CLKIN CLKIN EN CLK
n
CLK
n
LHLLH
HLLHL
XXHLH