© 1999 Fairchild Semiconductor Corporation DS010943 www.fairchildsemi.com
October 1991
Revised November 1999
1
00310 Low
Skew
2
:
8 Dif
f
er
enti
al Clo
ck
Dr
iver
100310
Low Skew 2:8 Differential Clock Driver
General Description
The 100310 is a low skew 8-bit differential clock driver
which is designed to select between two separate differen-
tial clock inputs. The low output to output skew (< 50 ps) is
maintained for either clock input. A LOW on the select pin
(SEL) selects CLKINA, CLKINA and a HIGH on the SEL
pin selects the CLKINB, CLKINB inputs.
The 100310 is ideal for those applications that need the
ability to freely select between two clocks, or to maintain
the ability to switch to an alternate or backup clock should a
problem arise with the primary clock source.
A V
BB
output is provided for single-ended operation.
Features
a73 Low output to output skew
a73 Differential inputs and outputs
a73 Allows multiplexing between two clock inputs
a73 Voltage compensated operating range: −4.2V to −5.7V
a73 Available to industrial grade temperature range
(PLCC package only)

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
28-Pin PLCC
Truth Table
Order Number Package Number Package Description
100310QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100310QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Pin Names Description
CLKIN
n
, CLKIN
n
Differential Clock Inputs
SEL Select
CLK
0–7
, CLK
0–8
Differential Clock Outputs
V
BB
V
BB
Output
NC No Connect
CLKINA CLKINA CLKINB CLKINB SEL CLK
n
CLK
n
HLXXLHL
LHXXLLH
XXHLHHL
XXLHHLH