74VHC16244TTR
器件描述:16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (NON INVERTED)
文件大小:148.06KB,共10页
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器件资料摘要:
1/10February 2003
a73 HIGH SPEED:
t
PD
= 5.4 ns (TYP.) at V
CC
=5V
a73 LOW POWER DISSIPATION:
I
CC
=4µA (MAX.) at T
A
=25°C
a73 HIGH NOISE IMMUNITY:
V
NIH
=V
NIL
= 28% V
CC
(MIN.)
a73 POWER DOWN PROTECTION ON INPUTS
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
=8mA(MIN)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16244
a73 IMPROVED LATCH-UP IMMUNITY
a73 LOW NOISE: V
OLP
= 0.9V (MAX.)
DESCRIPTION
The 74VHC16244 is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE) fabricat-
ed with sub-micron silicon gate and double-layer
metal wiring C
2
MOS tecnology.
Any nG output control governs four BUS
BUFFERS. Output Enable inputs (nG)tied
together give full 16 bit operation.
When nG is LOW, the outputs are enabled. When
nG is HIGH, the output are in high impedance
state.
The device is designed to be used with 3-state
memory address drivers, etc.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no re-
gard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
74VHC16244
16-BIT BUS BUFFER
WITH 3-STATE OUTPUTS (NON INVERTED)
ORDER CODES
PACKAGE TUBE T & R
TSSOP 74VHC16244TTR
TSSOP
PIN CONNECTION