Data Sheet
29319.37E
3959
DMOS FULL-BRIDGE PWM
MOTOR DRIVER
Always order by complete part number:
Part Number Package R
θJA
* R
θJT
A3959SB 24-pin batwing DIP 38°C/W 6°C/W
A3959SB-T 24-pin batwing DIP; Lead-free 38°C/W 6°C/W
A3959SLB 24-lead batwing SOIC 50°C/W 6°C/W
A3959SLB-T 24-lead batwing SOIC; Lead-free 50°C/W 6°C/W
A3959SLP 28-lead thin shrink SOIC 40°C/W —
A3959SLP-T 28-lead thin shrink SOIC; Lead-free 40°C/W —
Designed for pulse-width modulated (PWM) current control of dc
motors, the A3959SB, A3959SLB, and A3959SLP are capable of
output currents to ±3 A and operating voltages to 50 V. Internal fixed
off-time PWM current-control timing circuitry can be adjusted via
control inputs to operate in slow, fast, and mixed current-decay modes.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM-control signals. Internal synchronous rectification
control circuitry is provided to reduce power dissipation during PWM
operation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage monitoring of supply and charge pump, and
crossover-current protection. Special power-up sequencing is not
required.
The A3959SB/SLB/SLP is a choice of three power packages, a
24-pin plastic DIP with a copper batwing tab (package suffix ‘B’), a
24-lead plastic SOIC with a copper batwing tab (package suffix ‘LB’),
and a thin (<1.2 mm) 28-lead plastic TSSOP with an exposed thermal
pad (suffix ‘LP’). In all cases, the power tab is at ground potential and
needs no electrical isolation. Each package is available in a lead-
free version (100% matte tin leadframe).
FEATURES
a73 ±3 A, 50 V Output Rating
a73 Low r
DS(on)
Outputs (270 mΩ, Typical)
a73 Mixed, Fast, and Slow Current-Decay Modes
a73 Synchronous Rectification for Low Power Dissipation
a73 Internal UVLO and Thermal-Shutdown Circuitry
a73 Crossover-Current Protection
a73 Internal Oscillator for Digital PWM Timing
A3959SLB (SOIC)
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, V
BB
......................... 50 V
Output Current, I
OUT
(Repetitive) ........... ±3.0 A
(Peak, <3 µs)................................... ±6.0 A
Logic Supply Voltage, V
DD
....................... 7.0 V
Logic Input Voltage Range, V
IN
(Continuous)............ -0.3 V to V
DD
+ 0.3 V
(t
w
<30 ns) ............... -1.0 V to V
DD
+ 1.0 V
Sense Voltage, V
S
(Continuous) .............. 0.5 V
(t
w
<3 µs) ........................................... 2.5 V
Reference Voltage, V
REF
............................ V
DD
Package Power Dissipation (T
A
= 25°C), P
D
A3959SB ........................................ 3.3 W*
A3959SLB ...................................... 2.5 W*
A3959SLP ...................................... 3.1 W*
Operating Temp. Range, T
A
.... -20°C to +85°C
Junction Temperature, T
J
..................... +150°C
Storage Temp. Range, T
S
..... -55°C to +150°C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified
current rating or a junction temperature of 150°C.
Note that the A3959SLB(SOIC), A3959SB (DIP),
and A3959SLP (TSSOP) do not share a common
terminal assignment.
* Double-sided board, one square inch copper each side. See also, Layout, page 7.
PWM TIMER
V
BB
24
23
22
21
20
19
18
17
16
15
14
13
GROUND
GROUND
SLEEP
NO
CONNECTION
OUTB
LOAD SUPPLY
SENSE
OUTA
NO
CONNECTION
EXT MODE
REF
VREG
Dwg. PP-069-4
1
2
3
4
5
6
7
8
9
12
11
10
9
GROUND
GROUND
CP
CP2
CP1
PHASE
V
DD
ENABLE
PFD2
BLANK
PFD1
LOGIC SUPPLY
θ
ROSC
LOGIC
NC
NC
CHARGE PUMP
÷10