TL/F/11547
54ABT/74ABT373
Octal
Transparent
Latch
with
TRI-STATE
Outputs
September 1995
54ABT/74ABT373
Octal Transparent Latch with TRI-STATE Outputs
General Description
The ’ABT373 consists of eight latches with TRI-STATE out-
puts for bus organized system applications. The flip-flops
appear transparent to the data when Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup
times is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH the bus output is in
the high impedance state.
Features
Y
TRI-STATE outputs for bus interfacing
Y
Output sink capability of 64 mA, source capability of
32 mA
Y
Guaranteed output skew
Y
Guaranteed multiple output switching specifications
Y
Output switching specified for both 50 pF and 250 pF
loads
Y
Guaranteed simultaneous switching, noise level and
dynamic threshold performance
Y
Guaranteed latchup protection
Y
High impedance glitch free bus loading during entire
power up and power down
Y
Nondestructive hot insertion capability
Y
Standard Military Drawing (SMD) 5962-9321801
Commercial Military
Package
Package Description
Number
74ABT373CSC (Note 1) M20B 20-Lead (0.300 Wide) Molded Small Outline, JEDEC
74ABT373CSJ (Note 1) M20D 20-Lead (0.300 Wide) Molded Small Outline, EIAJ
74ABT373CPC N20B 20-Lead (0.300 Wide) Molded Dual-In-Line
54ABT373J/883 J20A 20-Lead Ceramic Dual-In-Line
74ABT373CMSA (Note 1) MSA20 20-Lead Molded Shrink Small Outline, EIAJ Type II
54ABT373W/883 W20A 20-Lead Cerpack
54ABT373E/883 E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
74ABT373CMTC (Notes 1, 2) MTC20 20-Lead Molded Thin Shrink Small Outline, JEDEC
Note 1: Devices also available in 13 reel. Use suffix e SCX, SJX, MSAX, and MTCX.
Note 2: Contact factory for package availability.
Connection Diagrams
Pin Assignment
for DIP, SOIC, SSOP and Flatpak
TL/F/11547–1
Pin Assignment
for LCC
TL/F/11547–2
Pin Names Description
D
0
–D
7
Data Inputs
LE Latch Enable Input
(Active HIGH)
OE Output Enable Input
(Active LOW)
O
0
–O
7
TRI-STATE Latch
Outputs
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.