216CO2
器件资料摘要：
CUSTOMER PROCUREMENTSPECIFICATION
216COl/CO2
CPU CENTRALPROCESSINGUNIT
FEATURES
Part
Zi 6COl Z16CO2
Memory
Address
8 Mbytes 64 Kbytes
Memory
Extension
48 Mbytes 384 Kbytes
Speed
(MHz)
10 10
H Extendable Register Files
1 Nine Basic Instruction Types
n 40/48-Pin PDIP and 44-Pin PLCC Packages’
n +4.5 I V,, I +5.5-Volt Operating Range
n Low-Power CMOS
n 0°C to +70°C Temperature Range
n Eight User-Selectable Addressing Modes
n Seven Data Types
H Supports Three Interrupt Types and Four Traps
n RISC-Like Load/Store Architecture
GENERAL DESCRIPTION
The Z16COl/CO2 CPU are members of the 16-bit The processor’s resources include seven data types that
processor and controller family. Designed using a range from bits to 32-bit long words, and byte and word
RISC-like Load/Store architecture, the CPU can operate in strings, plus eight user-selectable addressing modes. The
either system or normal modes, permitting privileged nine basic instruction types can be combined with various
operations and improving operating system organization data types and addressing modes to form a powerful set
and implementation. of 414 instructions.
To boost the main CPU’s performance capability, the
processor core includes hardwired control and is a
16-bit real-time processor functioning at register access
speeds. Register flexibility is created by grouping or
overlapping multiple registers, and by allowing extended
register file capabilities as the system expands. Easy
extended register file control is accomplished through a
single instruction stream communication.
TheCPUsupportsthreetypesof interrupts (non-maskable,
vectored, and non-vectored) and four traps (system call,
extended process architecture instruction, privileged
instructions, and segmentation trap). The vectored and
non-vectored interrupts are maskable.
The extended processing architecture features provide a
modular approach to expanding both the hardware and
software capabilities of the Z16COl/CO2.
Notes:
All Signals with a preceding front slash, “/“, are active Low, e.g.:
B/AN (WORD is active Low); /B/W^(BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power
Ground “cc
V DO
GND “ss
cPs95scc0103 (3/95) 1
216COl/CO2
CPU CENTRALPROCESSINGUNIT
FEATURES
Part
Zi 6COl Z16CO2
Memory
Address
8 Mbytes 64 Kbytes
Memory
Extension
48 Mbytes 384 Kbytes
Speed
(MHz)
10 10
H Extendable Register Files
1 Nine Basic Instruction Types
n 40/48-Pin PDIP and 44-Pin PLCC Packages’
n +4.5 I V,, I +5.5-Volt Operating Range
n Low-Power CMOS
n 0°C to +70°C Temperature Range
n Eight User-Selectable Addressing Modes
n Seven Data Types
H Supports Three Interrupt Types and Four Traps
n RISC-Like Load/Store Architecture
GENERAL DESCRIPTION
The Z16COl/CO2 CPU are members of the 16-bit The processor’s resources include seven data types that
processor and controller family. Designed using a range from bits to 32-bit long words, and byte and word
RISC-like Load/Store architecture, the CPU can operate in strings, plus eight user-selectable addressing modes. The
either system or normal modes, permitting privileged nine basic instruction types can be combined with various
operations and improving operating system organization data types and addressing modes to form a powerful set
and implementation. of 414 instructions.
To boost the main CPU’s performance capability, the
processor core includes hardwired control and is a
16-bit real-time processor functioning at register access
speeds. Register flexibility is created by grouping or
overlapping multiple registers, and by allowing extended
register file capabilities as the system expands. Easy
extended register file control is accomplished through a
single instruction stream communication.
TheCPUsupportsthreetypesof interrupts (non-maskable,
vectored, and non-vectored) and four traps (system call,
extended process architecture instruction, privileged
instructions, and segmentation trap). The vectored and
non-vectored interrupts are maskable.
The extended processing architecture features provide a
modular approach to expanding both the hardware and
software capabilities of the Z16COl/CO2.
Notes:
All Signals with a preceding front slash, “/“, are active Low, e.g.:
B/AN (WORD is active Low); /B/W^(BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power
Ground “cc
V DO
GND “ss
cPs95scc0103 (3/95) 1