85211BMI-03 www.icst.com/products/hiperclocks.html REV. B NOVEMBER 15, 2005
1
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
BLOCK DIAGRAM PIN ASSIGNMENT
GENERAL DESCRIPTION
The ICS85211BI-03 is a low skew, high perfor-
mance 1-to-2 Differential-to-LVHSTL Fanout
Buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions
from ICS. The CLK, nCLK pair can accept most
standard differential input levels.The ICS85211BI-03 is char-
acterized to operate from a 3.3V power supply. Guar-
anteed output and part-to-part skew characteristics
make the ICS85211BI-03 ideal for those clock distribu-
tion applications demanding well defined performance
and repeatability.
FEATURES
• Two differential LVHSTL compatible outputs
• One differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency: 700MHz
• Translates any single-ended input signal to
LVHSTL levels with resistor bias on nCLK input
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1.3ns (maximum)
• Output duty cycle: 49% - 51% up to 266.6MHz
• V
OH
= 1.15V (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
HiPerClockS™
ICS
ICS85211BI-03
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
Q0
nQ0
Q1
nQ1
1
2
3
4
VDD
CLK
nCLK
GND
8
7
6
5
Q0
nQ0
Q1
nQ1
CLK
nCLK