ALLIANCE SEMICONDUCTOR
High Performance
1M×4
CMOS DRAM
AS4C14400
AS4C14405
®
1M-bit × 4 CMOS DRAM (Fast page mode or EDO)
Preliminary information
Features
• Organization: 1,048,576 words × 4 bits
• High speed
- 40/50/60/70 ns RAS access time
- 20/25/30/35 ns column address access time
- 10/13/15/18 ns CAS access time
• Low power consumption
- Active: 385 mW max (-60)
- Standby: 5.5 mW max, CMOS I/O
• Fast page mode (AS4C14400) or EDO (AS4C14405)
• 1024 refresh cycles, 16 ms refresh interval
- RAS-only or CAS-before-RAS refresh
• Read-modify-write
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 300 mil, 20/26-pin SOJ
- 300 mil, 20/26-pin TSOP
• Single 5V power supply
• ESD protection ≥ 2001V
• Latch-up current ≥ 200 mA
Pin arrangement
GND
I/O3
I/O2
CAS
OE
A8
A7
I/O0
I/O1
WE
RAS
A9
A0
A1
TSOP
A6
A5
A4
A2
A3
V
CC
1
2
3
4
5
9
10
26
25
24
23
22
18
17
11
12
13
16
15
14
GND
I/O3
I/O2
CAS
OE
A8
A7
I/O0
I/O1
WE
RAS
A9
A0
A1
A6
A5
A4
A2
A3
V
CC
1
2
3
4
5
9
10
26
25
24
23
22
18
17
11
12
13
16
15
14
SOJ
Pin designation
Pin(s) Description
A0 to A9 Address inputs
RAS Row address strobe
I/O0 to I/O3 Input/output
OE Output enable
CAS Column address strobe
WE Read/write control
V
CC
Power (5.0 ± 0.5V)
GND Ground
Selection guide
Shaded areas contain advance information.
Symbol 4C14400-40 4C14400-50 4C14400-60 4C14400-70 Unit
Maximum RAS access time t
RAC
40 50 60 70 ns
Maximum column address access time t
CAA
20 25 30 35 ns
Maximum CAS access time t
CAC
10 13 15 18 ns
Maximum output enable (OE) access time t
OEA
10 13 15 18 ns
Minimum read or write cycle time t
RC
70 90 110 130 ns
Minimum fast page mode cycle time t
PC
30 35 40 45 ns
Maximum operating current I
CC1
90 80 70 60 mA
Maximum CMOS standby current I
CC5
1.0 1.0 1.0 1.0 mA