TL/F/12157
74LVX163
Low
Voltage
Synchronous
Binary
Counter
with
Synchronous
Clear
December 1996
74LVX163
Low Voltage Synchronous Binary Counter with
Synchronous Clear
General Description
The LVX163 is a synchronous modulo-16 binary counter.
This device is synchronously presettable for application in
programmable dividers and has two types of Count Enable
inputs plus a Terminal Count output for versatility in forming
multistage counters. The CLK input is active on the rising
edge. Both PE and CLR inputs are active on low logic lev-
els. Presetting is synchronous to rising edge of CLK and the
Clear function of the LVX163 is synchronous to CLK. Two
enable inputs (ENP and ENT) and Carry Output are provid-
ed to enable easy cascading of counters, which facilitates
easy implementation of n-bit counters without using external
gates.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
Features
Y
Input voltage level translation from 5V to 3V
Y
Ideal for low power/low noise 3.3V applications
Y
Available in SOIC JEDEC, SOIC EIAJ, and TSSOP
packages
Y
Guaranteed simultaneous switching noise and dynamic
threshold performance
Logic Symbols
TL/F/12157–1
IEEE/IEC
TL/F/12157–2
Connection Diagram
Pin Assignment for
TSSOP and SOIC
TL/F/12157–3
SOIC JEDEC SOIC EIAJ TSSOP
Order Number 74LVX163M 74LVX163SJ 74LVX163MTC
74LVX163MX 74LVX163SJX 74LVX163MTCX
See NS Package
M16A M16D MTC16
Number
Pin
Description
Names
CEP Count Enable Parallel Input
CET Count Enable Trickle Input
CP Clock Pulse Input
MR Synchronous Master Reset Input
P
0
–P
3
Parallel Data Inputs
PE Parallel Enable Inputs
Q
0
–Q
3
Flip-Flop Outputs
TC Terminal Count Output
C
1996 National Semiconductor Corporation RRD-B30M17/Printed in U. S. A. http://www.national.com