AMMC-5618
器件资料摘要：
Description
Agilent’s AMMC- 5618 6−20 GHz
MMIC is an efficient two- stage
amplifier designed to be used as
a cascadable intermediate gain
block for EW applications. In
communication systems, it can
be used as a LO buffer, or as a
transmit driver amplifier. It is
fabricated using a PHEMT
integrated circuit structure that
provides exceptional efficiency
and flat gain performance.
During typical operation with a
single 5-V supply, each gain
stage is biased for Class- A
operation for optimal power
output with minimal distortion.
The RF input and output have
matching circuitry for use in
50- Ω environments. The
backside of the chip is both RF
and DC ground. This helps
simplify the assembly process
and reduces assembly related
performance variations and
costs. The MMIC is a cost
effective alternative to hybrid
(discrete FET) amplifiers that
require complex tuning and
assembly processes.
Note: These devices are ESD sensitive. The following precautions are strongly recommended:
Ensure that an ESD approved carrier is used when dice are transported from one destination to another.
Personal grounding is to be worn at all times when handling these devices.
Agilent AMMC-5618
6 - 20 GHz Amplifier
Data Sheet
Features
• Frequency Range: 6 − 20 GHz
• High Gain: 14.5 dB Typical
Output Power: 19.5 dBm Typical
Input and Output Return Loss: < -12
dB
Flat Gain Response: ± 0.3 dB Typical
Single Supply Bias: 5 V @ 107 mA
Applications
Driver/Buffer in microwave
communication systems
Cascadable gain stage for EW
systems
Phased array radar and transmit
amplifiers
AMMC-5618 Absolute Maximum Ratings
[1]
Symbol Parameters/Conditions Units Min. Max.
V
D1
,V
D2
Drain Supply Voltage V 7
V
G1
Optional Gate Voltage V -5 +1
V
G2
Optional Gate Voltage V -5 +1
I
D1
Drain Supply Current mA 70
I
D2
Drain Supply Current mA 84
P
in
RF Input Power dBm 20
T
ch
Channel Temp. °C +150
T
b
Operating Backside Temp. °C-5
T
stg
Storage Temp. °C -65 +165
T
max
Maximum Assembly Temp. (60 sec max) °C +300
Note:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
Chip Size: 920 x 920 µm (36.2 x 36.2 mils)
Chip Size Tolerance:± 10µm (± 0.4 mils)
Chip Thickness: 100 ± 10µm (4 ± 0.4 mils)
Pad Dimensions: 80 x 80 µm (3.1 x 3.1 mils or larger)
Agilent’s AMMC- 5618 6−20 GHz
MMIC is an efficient two- stage
amplifier designed to be used as
a cascadable intermediate gain
block for EW applications. In
communication systems, it can
be used as a LO buffer, or as a
transmit driver amplifier. It is
fabricated using a PHEMT
integrated circuit structure that
provides exceptional efficiency
and flat gain performance.
During typical operation with a
single 5-V supply, each gain
stage is biased for Class- A
operation for optimal power
output with minimal distortion.
The RF input and output have
matching circuitry for use in
50- Ω environments. The
backside of the chip is both RF
and DC ground. This helps
simplify the assembly process
and reduces assembly related
performance variations and
costs. The MMIC is a cost
effective alternative to hybrid
(discrete FET) amplifiers that
require complex tuning and
assembly processes.
Note: These devices are ESD sensitive. The following precautions are strongly recommended:
Ensure that an ESD approved carrier is used when dice are transported from one destination to another.
Personal grounding is to be worn at all times when handling these devices.
Agilent AMMC-5618
6 - 20 GHz Amplifier
Data Sheet
Features
• Frequency Range: 6 − 20 GHz
• High Gain: 14.5 dB Typical
Output Power: 19.5 dBm Typical
Input and Output Return Loss: < -12
dB
Flat Gain Response: ± 0.3 dB Typical
Single Supply Bias: 5 V @ 107 mA
Applications
Driver/Buffer in microwave
communication systems
Cascadable gain stage for EW
systems
Phased array radar and transmit
amplifiers
AMMC-5618 Absolute Maximum Ratings
[1]
Symbol Parameters/Conditions Units Min. Max.
V
D1
,V
D2
Drain Supply Voltage V 7
V
G1
Optional Gate Voltage V -5 +1
V
G2
Optional Gate Voltage V -5 +1
I
D1
Drain Supply Current mA 70
I
D2
Drain Supply Current mA 84
P
in
RF Input Power dBm 20
T
ch
Channel Temp. °C +150
T
b
Operating Backside Temp. °C-5
T
stg
Storage Temp. °C -65 +165
T
max
Maximum Assembly Temp. (60 sec max) °C +300
Note:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
Chip Size: 920 x 920 µm (36.2 x 36.2 mils)
Chip Size Tolerance:± 10µm (± 0.4 mils)
Chip Thickness: 100 ± 10µm (4 ± 0.4 mils)
Pad Dimensions: 80 x 80 µm (3.1 x 3.1 mils or larger)