TL/F/9602
93L09
Dual
4-Input
Multiplexer
June 1989
93L09
Dual 4-Input Multiplexer
General Description
The 93L09 monolithic dual 4-input digital multiplexers con-
sist of two multiplexing circuits with common input select
logic. Each circuit contains four inputs and fully buffered
complementary outputs. In addition to multiplexer operation,
the 93L09 can generate any two functions of three vari-
ables. Active pullups in the outputs ensure high drive and
high speed performance. Because of its high speed per-
formance and on-chip select decoding, the 93L09 may be
cascaded to multiple levels so that any number of lines can
be multiplexed onto a single output bus.
Features
Y
Multifunction capability
Y
On-chip select logic decoding
Y
Fully buffered complementary outputs
Connection Diagram
Dual-In-Line Package
TL/F/9602–1
Order Number 93L09DMQB or 93L09FMQB
See NS Package Number J16A or W16A
Logic Symbol
TL/F/9602–2
V
CC
e Pin 16
GND e Pin 8
Pin Names Description
S0, S1 Common Select Inputs
I0a–I3a Multiplexer A Inputs
Za Multiplexer A Output
Za Complementary Multiplexer A Output
I0b–I3b Multiplexer B Inputs
Zb Multiplexer B Output
Zb Complementary Multiplexer B Output
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.