54ACT899
器件描述:9-Bit Latchable Transceiver with Parity Generator/Checker
文件大小:214.46KB,共14页
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器件资料摘要:
TL/F/10637
74AC899
#
54ACT/74ACT899
9-Bit
Latchable
Transceiver
with
Parity
Generator/Checker
August 1994
74AC899 # 54ACT/74ACT899
9-Bit Latchable Transceiver
with Parity Generator/Checker
General Description
The ’AC/’ACT899 is a 9-bit to 9-bit parity transceiver with
transparent latches. The device can operate as a feed-
through transceiver or it can generate/check parity from the
8-bit data busses in either direction. The ’AC/’ACT899 fea-
tures independent latch enables for the A-to-B direction and
the B-to-A direction, a select pin for ODD/EVEN parity, and
separate error signal output pins for checking parity.
Features
Y
Latchable transceiver with output sink of 24 mA
Y
Option to select generate parity and check or ‘‘feed-
through’’ data/parity in directions A-to-B or B-to-A
Y
Independent latch enable for A-to-B and B-to-A direc-
tions
Y
Select pin for ODD/EVEN parity
Y
ERRA and ERRB output pins for parity checking
Y
Ability to simultaneously generate and check parity
Y
May be used in system applications in place of the ’280
Y
May be used in system applications in place of the ’657
and ’373 (no need to change T/R to check parity)
Y
4 kV minimum ESD immunity
Logic Symbol
TL/F/10637–1
Connection Diagram
Pin Assignment for PCC and LCC
TL/F/10637–2
TRI-STATE is a registered trademark of National Semiconductor Corporation.
FACTTM is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.