© 2002 Fairchild Semiconductor Corporation DS500648 www.fairchildsemi.com
September 2001
Revised February 2002
7
4
AL
VCH245 Low
V
o
l
t
age Bidi
rec
t
i
onal T
r
a
n
sceiv
e
r w
i
th Bushol
d
74ALVCH245
Low Voltage Bidirectional Transceiver with Bushold
General Description
The ALVCH245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B Ports
by placing them in a high impedance state. The ALVCH245
data inputs include active bushold circuitry, eliminating the
need for external pull-up resistors to hold unused or float-
ing data inputs at a valid logic level.
The 74ALVCH245 is designed for low voltage (1.65V to
3.6V) V
CC
applications.
The 74ALVCH245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
a73 1.65V to 3.6V V
CC
supply operation
a73 Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
a73 t
PD
3.6 ns max for 3.0V to 3.6V V
CC
4.2 ns max for 2.3V to 2.7V V
CC
6 ns max for 1.65V to 1.95V V
CC
a73 Uses patented Quiet Series noise/EMI reduction
circuitry
a73 Latchup conforms to JEDEC JED78
a73 ESD performance:
Human body model > 2000V
Machine model > 200V

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ALVCH245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ALVCH245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE Output Enable Input (Active LOW)
T/R Transmit/Receive Input
A
0
–A
7
Side A Bushold Inputs or 3-STATE Outputs
B
0
–B
7
Side B Bushold Inputs or 3-STATE Outputs