BSS110
器件描述：P-Channel Enhancement Mode Field Effect Transistor
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：285.09KB，共10页
Sponsor by e络盟器件资料摘要：
May 1999
BSS84 / BSS110
P -Channel Enhancement Mode Field Effect Transistor
General Description Features
____________ ________________________________________________________________________________
Absolute Maximum Ratings T A = 25°C unless otherwise noted
Symbol Parameter BSS84 BSS110 Units
V DSS Drain-Source Voltage -50 V
V DGR Drain-Gate Voltage (R GS < 20 K Ω) -50 V
V GSS Gate-Source Voltage - Continuous ±20 V
I D Drain Current - Continuous @ T A = 30/35 o C -0.13 -0.17 A
- Pulsed @ T A = 2 5 o C -0.52 -0.68
P D Maximum Power Dissipation T A = 25 ° C 0.36 0.63 W
T J ,T STG Operating and Storage Temperature Range -55 to 15 0 °C
T L Maximum lead temperature for soldering
purposes, 1/16" from case for 10 seconds
300 °C
THERMAL CHARACTERISTICS
R θJA Thermal Resistance, Junction-to-Ambient 350 200 °C/W
BSS84 Rev. C1 / BSS110. Rev. A2
These P-C hannel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is designed to minimize on-state resistance, provide
rugged and reliable performance and fast switching. They
can be used, with a minimum of effort, in most applications
requiring up to 0.17A DC and can deliver pulsed currents up
to 0.68A. This product is particularly suited to low voltage
applications requiring a low current high side switch.
BSS84: -0.13A, -50V. R DS(ON ) = 10 Ω @ V GS = -5V.
BSS110: -0.17A, -50V. R DS(ON ) = 10 Ω @ V GS = -10V
Voltage controlled p-channel small signal switch.
High density cell design for low R DS(ON) .
High saturation current .
S
D
G
© 1997 Fairchild Semiconductor Corporation
BSS84 / BSS110
P -Channel Enhancement Mode Field Effect Transistor
General Description Features
____________ ________________________________________________________________________________
Absolute Maximum Ratings T A = 25°C unless otherwise noted
Symbol Parameter BSS84 BSS110 Units
V DSS Drain-Source Voltage -50 V
V DGR Drain-Gate Voltage (R GS < 20 K Ω) -50 V
V GSS Gate-Source Voltage - Continuous ±20 V
I D Drain Current - Continuous @ T A = 30/35 o C -0.13 -0.17 A
- Pulsed @ T A = 2 5 o C -0.52 -0.68
P D Maximum Power Dissipation T A = 25 ° C 0.36 0.63 W
T J ,T STG Operating and Storage Temperature Range -55 to 15 0 °C
T L Maximum lead temperature for soldering
purposes, 1/16" from case for 10 seconds
300 °C
THERMAL CHARACTERISTICS
R θJA Thermal Resistance, Junction-to-Ambient 350 200 °C/W
BSS84 Rev. C1 / BSS110. Rev. A2
These P-C hannel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is designed to minimize on-state resistance, provide
rugged and reliable performance and fast switching. They
can be used, with a minimum of effort, in most applications
requiring up to 0.17A DC and can deliver pulsed currents up
to 0.68A. This product is particularly suited to low voltage
applications requiring a low current high side switch.
BSS84: -0.13A, -50V. R DS(ON ) = 10 Ω @ V GS = -5V.
BSS110: -0.17A, -50V. R DS(ON ) = 10 Ω @ V GS = -10V
Voltage controlled p-channel small signal switch.
High density cell design for low R DS(ON) .
High saturation current .
S
D
G
© 1997 Fairchild Semiconductor Corporation