74LCX646MSAX
器件描述：Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：105.4KB，共10页
Sponsor by e络盟器件资料摘要：
© 2001 Fairchild Semiconductor Corporation DS011997 www.fairchildsemi.com
February 1994
Revised March 2001
7
4
LCX646
Low V
o
lt
age
Oct
a
l T
r
a
n
sceiv
e
r/
R
e
gist
er wit
h
5V T
o
ler
a
nt In
puts and O
u
t
put
s
74LCX646
Low Voltage Octal Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX646 consists of registered bus transceiver circuits,
D-type flip-flops, and control circuitry providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Data on the A or B bus will be
loaded into the respective registers on the LOW-to-HIGH
transition of the appropriate pin (CPAB or CPBA) (see
Functional Description).
The LCX646 is designed for low voltage (2.5V or 3.3V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX646 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V − 3.6V V
CC
specifications provided
a73 7.0 ns t
PD
max (V
CC
= 3.3V), 10 µA I
CC
max
a73 Power down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74LCX646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LCX646MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX646MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
0
–A
7
Data Register A Inputs
Data Register A Outputs
B
0
–B
7
Data Register B Inputs
Data Register B Outputs
CPAB, CPBA Clock Pulse Inputs
SAB, SBA Transmit/Receive Inputs
OE Output Enable Input
DIR Direction Control Input
February 1994
Revised March 2001
7
4
LCX646
Low V
o
lt
age
Oct
a
l T
r
a
n
sceiv
e
r/
R
e
gist
er wit
h
5V T
o
ler
a
nt In
puts and O
u
t
put
s
74LCX646
Low Voltage Octal Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX646 consists of registered bus transceiver circuits,
D-type flip-flops, and control circuitry providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Data on the A or B bus will be
loaded into the respective registers on the LOW-to-HIGH
transition of the appropriate pin (CPAB or CPBA) (see
Functional Description).
The LCX646 is designed for low voltage (2.5V or 3.3V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX646 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V − 3.6V V
CC
specifications provided
a73 7.0 ns t
PD
max (V
CC
= 3.3V), 10 µA I
CC
max
a73 Power down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 ±24 mA output drive (V
CC
= 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74LCX646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LCX646MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX646MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
0
–A
7
Data Register A Inputs
Data Register A Outputs
B
0
–B
7
Data Register B Inputs
Data Register B Outputs
CPAB, CPBA Clock Pulse Inputs
SAB, SBA Transmit/Receive Inputs
OE Output Enable Input
DIR Direction Control Input