TL/F/11582
74ABT3284
18-Bit
Synchronous
Datapath
Multiplexer
October 1995
74ABT3284
18-Bit Synchronous Datapath Multiplexer
General Description
The 74ABT3284 is a synchronous datapath buffer designed
to transmit four 9-bit bytes of data onto one or two 9-bit
bytes in 2:1 or 4:1 multiplexed configurations. In addition,
the non-inverting transceiver supports bidirectional data
transfer in transparent or registered modes. A data byte
from any one of the six ports can be stored during transpar-
ent operation for later recall. Data input to any port may also
be read back to itself for byte manipulation or system self-di-
agnostic purposes.
The 74ABT3284 is useful for interleaving data in memory
applications or for use in bus-to-bus communications where
variations in data word length or construction are required.
Features
Y
Advanced BiCMOS technology provides high speed at
low power consumption
Y
18-bit 2:1 or 9-bit 4:1 multiplexed modes
Y
Registered or transparent datapath operation
Y
Output enables and select lines have the option of be-
ing synchronized for pipelined operation
Y
Independent input, output register and control synchro-
nizing clocks insure maximum timing flexibility
Y
Independent control signals insure functional flexibility
Y
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Y
Guaranteed latchup protection
Y
High impedance glitch free bus loading during entire
power up and power down cycle
Y
Non-destructive hot insertion capability
Commercial Package Number Package Description
74ABT3284VJG VJG100A 100-Lead (14mm x 14mm) Molded Plastic Quad Flatpak, JEDEC
Connection Diagram
TL/F/11582–1
Pin Assignment
Pin Pin Pin Pin
1 Mode
—
SO 26 V
CC
51 CP
—
IN 76 V
CC
2CP
—
AX 27 A
8
52 OEB 77 D
8
3 OEC 28 A
7
53 LDBI 78 D
7
4 LDCI 29 A
6
54 LDBO 79 D
6
5 LDCO 30 GND 55 Mode
—
W 80 GND
6SA
2
X
1
31 A
5
56 YSEL 81 D
5
7SA
2
X
0
32 A
4
57 OEY 82 D
4
8X
0
33 A
3
58 Y
8
83 D
3
9X
1
34 A
2
59 Y
7
84 D
2
10 GND 35 GND 60 GND 85 GND
11 X
2
36 A
1
61 Y
6
86 D
1
12 X
3
37 A
0
62 Y
5
87 D
0
13 X
4
38 V
CC
63 Y
4
88 V
CC
14 X
5
39 B
0
64 Y
3
89 C
0
15 X
6
40 B
1
65 Y
2
90 C
1
16 GND 41 GND 66 GND 91 GND
17 X
7
42 B
2
67 Y
1
92 C
2
18 X
8
43 B
3
68 Y
0
93 C
3
19 OEX 44 B
4
69 LDDO 94 C
4
20 XSEL
0
45 B
5
70 LDDI 95 C
5
21 XSEL
1
46 GND 71 ASEL1 96 GND
22 LDAO 47 B
6
72 ASEL0 97 C
6
23 LDAI 48 B
7
73 OED 98 C
7
24 OEA 49 B
8
74 CP
—
XA 99 C
8
25 V
CC
50 V
CC
75 Mode
—
SC 100 V
CC
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M125/Printed in U. S. A.