C0083C0078C0053C0052C0065C0066C0084C0049C0054C0050C0056C0050C0055C0065C0044 C0083C0078C0055C0052C0065C0066C0084C0049C0054C0050C0056C0050C0055C0065
C0050C0048C0262C0066C0073C0084 C0066C0085C0070C0070C0069C0082C0083C0047C0068C0082C0073C0086C0069C0082C0083
C0087C0073C0084C0072 C0051C0262C0083C0084C0065C0084C0069 C0079C0085C0084C0080C0085C0084C0083
SCBS248F − JULY 1993 − REVISED JUNE 2004
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Members of the Texas Instruments
Widebus Family
C0068 Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
C0068 High-Impedance State During Power Up
and Power Down
C0068 Typical V
OLP
(Output Ground Bounce)
<1 V at V
CC
= 5 V, T
A
= 25°C
C0068 Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
C0068 I
off
and Power-Up 3-State Support Hot
Insertion
C0068 Flow-Through Architecture Optimizes PCB
Layout
C0068 Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
C0068 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
The ’ABT162827A devices are noninverting
20-bit buffers composed of two 10-bit buffers with
separate output-enable signals. For either 10-bit
buffer, the two output-enable (1OE1 and 1OE2, or
2OE1 and 2OE2) inputs must both be low for the
corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
10-bit buffer are in the high-impedance state.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-Ω series
resistors to reduce overshoot and undershoot.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube SN74ABT162827ADL
ABT162827A
−40°C to 85°C
Tape and reel SN74ABT162827ADLR
TSSOP − DGG Tape and reel SN74ABT162827ADGGR ABT162827A
−55°C to 125°C CFP − WD Tube SNJ54ABT162827AWD SNJ54ABT162827AWD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
SN54ABT162827A . . . WD PACKAGE
SN74ABT162827A . . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
V
CC
2Y7
2Y8
GND
2Y9
2Y10
2OE1
1OE2
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2A9
2A10
2OE2
Copyright  2004, Texas Instruments Incorporated
C0085C0078C0076C0069C0083C0083 C0079C0084C0072C0069C0082C0087C0073C0083C0069 C0078C0079C0084C0069C0068 C0116C0104C0105C0115 C0100C0111C0099C0117C0109C0101C0110C0116 C0099C0111C0110C0116C0097C0105C0110C0115 C0080C0082C0079C0068C0085C0067C0084C0073C0079C0078
C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046 C0080C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0110C0102C0111C0114C0109 C0116C0111
C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115 C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046
C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101 C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108
C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
Widebus is a trademark of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.