© 2005 Fairchild Semiconductor Corporation DS500453 www.fairchildsemi.com
June 2000
Revised February 2005
7
4LCX10
Low V
o
l
t
age T
r
i
p
le

3-
Input
N
AND G
a
te w
i
t
h

5V T
o
ler
ant Inpu
t
s
74LCX10
Low Voltage Triple 3-Input NAND Gate
with 5V Tolerant Inputs
General Description
The LCX10 contains three 3-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX10 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs
a73 2.3V–3.6V V
CC
specifications provided
a73 4.9 ns t
PD
max (V
CC
c32 3.3V), 10 c80A I
CC
max
a73 Power down high impedance inputs and outputs
a73 c11424 mA output drive (V
CC
c32 3.0V)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human body model c33 2000V
Machine model c33 200V

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions Truth Table
O
n
c32 A
n
B
n
C
n
H c32 HIGH Voltage Level X c32 Immaterial
L c32 LOW Voltage Level
Order Number Package Number Package Description
74LCX10M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX10SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX10MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
A
n
, B
n
, C
n
Inputs
O
n
Outputs
A
n
B
n
C
n
O
n
XXLH
XLXH
LXXH
HHHL