June 2003
2003 Fairchild Semiconductor Corporation BSS123 Rev G(W)
BSS123
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. These products
have been designed to minimize on-state resistance
while provide rugged, reliable, and fast switching
performance.These products are particularly suited for
low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and
other switching applications.
Features
• 0.17 A, 100 V. RDS(ON) = 6Ω @ VGS = 10 V
RDS(ON) = 10Ω @ VGS = 4.5 V
• High density cell design for extremely low RDS(ON)
• Rugged and Reliable
• Compact industry standard SOT-23 surface mount
package
G
D
S
SOT-23
D
SG
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 100 V
VGSS Gate-Source Voltage ±20 V
ID Drain Current – Continuous (Note 1) 0.17 A
– Pulsed 0.68
Maximum Power Dissipation (Note 1) 0.36 WPD
Derate Above 25°C 2.8 mW/°C
TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C
TL Maximum Lead Temperature for SolderingPurposes, 1/16” from Case for 10 Seconds 300
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 350 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
SA BSS123 7’’ 8mm 3000 units
BSS123