74VCX162244G
器件描述：Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistor in Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：120.53KB，共10页
Sponsor by e络盟器件资料摘要：
© 2005 Fairchild Semiconductor Corporation DS500040 www.fairchildsemi.com
August 1997
Revised June 2005
7
4
VC
X16
2244
L
o
w
V
o
lt
age
16-
Bit
Buf
f
er
/Li
ne Driv
er w
i
th 3.
6V
T
o
l
e
rant
I
nput
s and O
u
t
put
s and 26
G58
Seri
es
Res
i
st
or in Output
s
74VCX162244
Low Voltage 16-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
and 26G58 Series Resistor in Outputs
General Description
The VCX162244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX162244 is designed for low voltage (1.2V to
3.6V) V
CC
applications with I/O capability up to 3.6V. The
74VCX162244 is also designed with 26c58 series resistors in
the outputs. This design reduces line noise in applications
such as memory address drivers, clock drivers, and bus
transceivers/transmitters.
The 74VCX162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
a73 1.2V to 3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 26c58 series resistors in outputs
a73 t
PD
3.3 ns max for 3.0V to 3.6V V
CC
a73 Power-off high impedance inputs and outputs
a73 Supports live insertion and withdrawal
a73 Static Drive (I
OH
/I
OL
)
c11412 mA @ 3.0V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 300 mA
a73 ESD performance:
Human body model c33 2000V
Machine model c33 200V
a73 Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: Ordering Code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number Package Number Package Description
74VCX162244G
(Note 2)(Note 3)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX162244MTD
(Note 3)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
August 1997
Revised June 2005
7
4
VC
X16
2244
L
o
w
V
o
lt
age
16-
Bit
Buf
f
er
/Li
ne Driv
er w
i
th 3.
6V
T
o
l
e
rant
I
nput
s and O
u
t
put
s and 26
G58
Seri
es
Res
i
st
or in Output
s
74VCX162244
Low Voltage 16-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
and 26G58 Series Resistor in Outputs
General Description
The VCX162244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX162244 is designed for low voltage (1.2V to
3.6V) V
CC
applications with I/O capability up to 3.6V. The
74VCX162244 is also designed with 26c58 series resistors in
the outputs. This design reduces line noise in applications
such as memory address drivers, clock drivers, and bus
transceivers/transmitters.
The 74VCX162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
a73 1.2V to 3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 26c58 series resistors in outputs
a73 t
PD
3.3 ns max for 3.0V to 3.6V V
CC
a73 Power-off high impedance inputs and outputs
a73 Supports live insertion and withdrawal
a73 Static Drive (I
OH
/I
OL
)
c11412 mA @ 3.0V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 300 mA
a73 ESD performance:
Human body model c33 2000V
Machine model c33 200V
a73 Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: Ordering Code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number Package Number Package Description
74VCX162244G
(Note 2)(Note 3)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX162244MTD
(Note 3)
MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide