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ADP3415

器件描述:Dual MOSFET Driver with Bootstrapping
器件厂商:AD [Analog Devices]
厂商主页:http://www.analog.com/
文件大小:166.22KB,共12页
Sponsor by e络盟
器件资料摘要:
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.
ADP3415
Dual MOSFET Driver
with Bootstrapping
FEATURES
All-in-One Synchronous Buck Driver
One PWM Signal Generates Both Drives
Anticross Conduction Protection Circuitry
Programmable Transition Delay
Zero-Crossing Synchronous Drive Control
Synchronous Override Control
Undervoltage Lockout
Shutdown Quiescent Current <100 H9262A
APPLICATIONS
Mobile Computing CPU Core Power Converters
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
FUNCTIONAL BLOCK DIAGRAM
VCC
BST
DRVH
SW
DLY
GND
DRVL
ADP3415
SD
DRVLSD
IN
OVERLAP
PROTECTION
CIRCUIT
UVLO
VCC
GENERAL DESCRIPTION
The ADP3415 is a dual MOSFET driver optimized for driving
two N-channel FETs that are the two switches in the nonisolated
synchronous buck power converter topology. Each driver size is
optimized for performance in notebook PC regulators for CPUs
in the 20 A range. The high-side driver can be bootstrapped atop
the switched node of the buck converter as needed to drive the
upper switch and is designed to accommodate the high voltage
slew rate associated with high performance, high frequency
switching. The ADP3415 features an overlapping protection
circuit (OPC); undervoltage lockout (UVLO) that holds the
switches off until the driver is assured of having sufficient voltage
for proper operation; a programmable transition delay; and a
synchronous drive disable pin. The quiescent current, when the
device is disabled, is less than 100 µA.
The ADP3415 is specified over the extended commercial
temperature range of 0°C to 100°C and is available in a 10-lead
MSOP package.
BST
DRVH
SW
SD
IN
DRVLSD
DLY
GND
DRVL
ADP3415
V
DCIN
V
OUT
5V
FROM SYSTEM
ENABLE CONTROL
FROM DUTY RATIO
MODULATOR
FROM SYSTEM
STATE LOGIC
VCC
Figure 1. Typical Application Circuit