74LCX241MSAX
器件描述：Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：115.85KB，共10页
Sponsor by e络盟器件资料摘要：
© 2005 Fairchild Semiconductor Corporation DS012639 www.fairchildsemi.com
August 1998
Revised March 2005
7
4LCX241 Low
V
o
lt
age
Oct
a
l
Buf
f
er
/Li
ne Dr
iver
wi
th
5V T
o
l
e
rant
I
nput
s
and
O
u
tput
s
74LCX241
Low Voltage Octal Buffer/Line Driver with
5V Tolerant Inputs and Outputs
General Description
The LCX241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver. The device is designed
for low voltage (2.5V or 3.3V) V
CC
applications with capa-
bility of interfacing to a 5V signal environment.
The LCX241 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V – 3.6V V
CC
specifications provided
a73 6.5 ns t
PD
max (V
CC
c32 3.3V), 10 c80A I
CC
max
a73 Power-down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human Body Model c33 2000V
Machine Model c33 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE should be tied to GND through a resistor: the
minimum value or the resistor is determined by the current-sourcing capa-
bility of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74LCX241WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX241SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX241MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX241MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs
August 1998
Revised March 2005
7
4LCX241 Low
V
o
lt
age
Oct
a
l
Buf
f
er
/Li
ne Dr
iver
wi
th
5V T
o
l
e
rant
I
nput
s
and
O
u
tput
s
74LCX241
Low Voltage Octal Buffer/Line Driver with
5V Tolerant Inputs and Outputs
General Description
The LCX241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver. The device is designed
for low voltage (2.5V or 3.3V) V
CC
applications with capa-
bility of interfacing to a 5V signal environment.
The LCX241 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
a73 5V tolerant inputs and outputs
a73 2.3V – 3.6V V
CC
specifications provided
a73 6.5 ns t
PD
max (V
CC
c32 3.3V), 10 c80A I
CC
max
a73 Power-down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 Implements patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 500 mA
a73 ESD performance:
Human Body Model c33 2000V
Machine Model c33 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
and OE should be tied to GND through a resistor: the
minimum value or the resistor is determined by the current-sourcing capa-
bility of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram Pin Descriptions
Order Number Package Number Package Description
74LCX241WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX241SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX241MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX241MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs