74CBTLV1G125CRG4
器件描述：LOW-VOLTAGE SINGLE FET BUS SWITCH
器件厂商：TI [Texas Instruments]
厂商主页：http://www.ti.com/
文件大小：224.4KB，共8页
Sponsor by e络盟器件资料摘要：
C0083C0078C0055C0052C0067C0066C0084C0076C0086C0049C0071C0049C0050C0053
C0076C0079C0087C0262C0086C0079C0076C0084C0065C0071C0069 C0083C0073C0078C0071C0076C0069 C0070C0069C0084 C0066C0085C0083 C0083C0087C0073C0084C0067C0072
SCDS057G − MARCH 1998 − REVISED OCTOBER 2003
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 5-Ω Switch Connection Between Two Ports
C0068 Rail-to-Rail Switching on Data I/O Ports
C0068 I
off
Supports Partial-Power-Down Mode
Operation
description/ordering information
The SN74CBTLV1G125 features a single
high-speed line switch. The switch is disabled
when the output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using I
off
. The I
off
feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
−40°C to 85°C
SOT (SOT-23) − DBV Tape and reel SN74CBTLV1G125DBVR V25_
SOT (SC-70) − DCK Tape and reel SN74CBTLV1G125DCKR VM_
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
‡
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
OE
FUNCTION
L A port = B port
H Disconnect
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
OE
A
GND
V
CC
B
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
C0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
C0080C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0110C0102C0111C0114C0109 C0116C0111 C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115
C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046 C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101
C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
C0076C0079C0087C0262C0086C0079C0076C0084C0065C0071C0069 C0083C0073C0078C0071C0076C0069 C0070C0069C0084 C0066C0085C0083 C0083C0087C0073C0084C0067C0072
SCDS057G − MARCH 1998 − REVISED OCTOBER 2003
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 5-Ω Switch Connection Between Two Ports
C0068 Rail-to-Rail Switching on Data I/O Ports
C0068 I
off
Supports Partial-Power-Down Mode
Operation
description/ordering information
The SN74CBTLV1G125 features a single
high-speed line switch. The switch is disabled
when the output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using I
off
. The I
off
feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
−40°C to 85°C
SOT (SOT-23) − DBV Tape and reel SN74CBTLV1G125DBVR V25_
SOT (SC-70) − DCK Tape and reel SN74CBTLV1G125DCKR VM_
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
‡
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
OE
FUNCTION
L A port = B port
H Disconnect
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
OE
A
GND
V
CC
B
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
C0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
C0080C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0110C0102C0111C0114C0109 C0116C0111 C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115
C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046 C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101
C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046