1. General description
The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and
superior to most advanced CMOS compatible TTL families.
The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
2. Features
a73 Wide supply voltage range from 1.65 V to 3.6 V
a73 3.6 V tolerant inputs/outputs
a73 CMOS low power consumption
a73 Direct interface with TTL levels (2.7 V to 3.6 V)
a73 Power-down mode
a73 Unlimited input rise and fall times
a73 Latch-up performance exceeds 250 mA
a73 Complies with JEDEC standard:
a78 JESD8-7 (1.65 V to 1.95 V)
a78 JESD8-5 (2.3 V to 2.7 V)
a78 JESD8-B/JESD36 (2.7 V to 3.6 V)
a73 ESD protection:
a78 HBM EIA/JESD22-A114-B exceeds 2000 V
a78 MM EIA/JESD22-A115-A exceeds 200 V
a73 Multiple package options
3. Quick reference data
74ALVC14
Hex inverting Schmitt trigger
Rev. 03 — 15 February 2005 Product data sheet
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
t
PHL
, t
PLH
propagation delay nA
to nY
V
CC
= 1.8 V; C
L
= 30 pF;
R
L
= 1 kΩ
- 2.9 - ns
V
CC
= 2.5 V; C
L
= 30 pF;
R
L
= 500 Ω
- 2.2 - ns
V
CC
= 2.7 V; C
L
= 50 pF;
R
L
= 500 Ω
- 2.8 - ns
V
CC
= 3.3 V; C
L
= 50 pF;
R
L
= 500 Ω
- 2.4 - ns