EEWorld首页 新闻 论坛 博客 白皮书 专题 电子电路 电子器件 单片机 嵌入式 模拟电路 DSP FPGA 电源管理 手机/便携 医疗电子 汽车电子 工业控制
厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

5962-8970401CA

器件描述:High-Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register
器件厂商:TI [Texas Instruments]
厂商主页:http://www.ti.com/
文件大小:269.59KB,共11页
Sponsor by e络盟
器件资料摘要:
1
Data sheet acquired from Harris Semiconductor
SCHS155C
Features
• Buffered Inputs
• Asynchronous Master Reset
• Typical f
MAX
= 60MHz at V
CC
= 5V, C
L
= 15pF,
T
A
= 25
o
C
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC164 and ’HCT164 are 8-bit serial-in parallel-out shift
registers with asynchronous reset. Data is shifted on the
positive edge of Clock (CP). A LOW on the Master Reset
(MR) pin resets the shift register and all outputs go to the
LOW state regardless of the input conditions. Two Serial
Data inputs (DS1 and DS2) are provided, either one can be
used as a Data Enable control.
Pinout
CD54HC164, CD54HCT164
(CERDIP)
CD74HC164, CD74HCT164
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC164F3A -55 to 125 14 Ld CERDIP
CD54HCT164F3A -55 to 125 14 Ld CERDIP
CD74HC164E -55 to 125 14 Ld PDIP
CD74HC164M -55 to 125 14 Ld SOIC
CD74HC164MT -55 to 125 14 Ld SOIC
CD74HC164M96 -55 to 125 14 Ld SOIC
CD74HCT164E -55 to 125 14 Ld PDIP
CD74HCT164M -55 to 125 14 Ld SOIC
CD74HCT164MT -55 to 125 14 Ld SOIC
CD74HCT164M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
DS1
DS2
Q
0
Q
1
Q
2
Q
3
GND
V
CC
Q
7
Q
6
Q
5
Q
4
MR
CP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
October 1997 - Revised August 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
CD54HC164, CD74HC164,
CD54HCT164, CD74HCT164
High-Speed CMOS Logic
8-Bit Serial-In/Parallel-Out Shift Register
[ /Title
(CD74
HC164
,
CD74
HCT16
4)
/Sub-
ject
(High
Speed
CMOS
Logic
8-Bit
Serial-
In/Par-
allel-