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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

74VHCT03AMTR

器件描述:QUAD 2-INPUT OPEN DRAIN NAND GATE
器件厂商:STMICROELECTRONICS [STMicroelectronics]
厂商主页:http://www.st.com/
文件大小:158.02KB,共8页
Sponsor by e络盟
器件资料摘要:
1/8June 2001
a73 HIGH SPEED: t
PZ
= 3.9 ns (TYP.) at V
CC
= 5V
a73 LOW POWER DISSIPATION:
I
CC
= 2 µA (MAX.) at T
A
=25°C
a73 COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX)
a73 POWER DOWN PROTECTION ON INPUTS
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 03
a73 IMPROVED LATCH-UP IMMUNITY
a73 LOW NOISE: V
OLP
= 0.8V (MAX.)
DESCRIPTION
The 74VHCT03A is an advanced high-speed
CMOS QUAD 2-INPUT OPEN DRAIN NAND
GATE fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
This device can, with an external pull-up resistor,
be used in wired AND configuration. This device
can also be used as a led driver and in any other
application requiring a current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V since all inputs are
equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHCT03A
QUAD 2-INPUT OPEN DRAIN NAND GATE

PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHCT03AM 74VHCT03AMTR
TSSOP 74VHCT03ATTR
TSSOPSOP