TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS


SLOS052B – OCTOBER 1987 – REVISED AUGUST 1994
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Trimmed Offset Voltage:
TLC27L7 . . . 500 µV Max at 25°C,
V
DD
= 5 V
C0068 Input Offset Voltage Drift . . . Typically
0.1 µV/Month, including the First 30 Days
C0068 Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C...3 V to 16 V
–40°C to 85°C...4 V to 16 V
–55°C to 125°C...4 V to 16 V
C0068 Single-Supply Operation
C0068 Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix Types)
C0068 Ultra-Low Power...Typically 95 µW
at 25°C, V
DD
= 5 V
C0068 Output Voltage Range includes Negative
Rail
C0068 High Input Impedance...10
12
Ω Typ
C0068 ESD-Protection Circuitry
C0068 Small-Outline Package Option Also
Available in Tape and Reel
C0068 Designed-In Latch-Up immunity

description
The TLC27L2 and TLC27L7 dual operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high
input impedance, extremely low power, and high
gain.
AVAILABLE OPTIONS
PACKAGE
T
A
V
IO
max
AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
0°C
500 µV TLC27L7CD TLC27L7CP
to

2 mV TLC27L2BCD TLC27L2BCP

70°C
5 mV TLC27L2ACD
— —
TLC27L2ACP
10 mV TLC27L2CD TLC27L2CP
40°C
500 µV TLC27L7ID TLC27L7IP
–40
to

2 mV TLC27L2BID TLC27L2BIP

85°C
5 mV TLC27L2AID
— —
TLC27L2AIP
10 mV TLC27L2ID TLC27L2IP
–55°C
to
500 µV TLC27L7MD TLC27L7MFK TLC27L7MJG TLC27L7MP
125°C
10 mV TLC27L2MD TLC27L2MFK TLC27L2MJG TLC27L2MP
The D package is available taped and reeled. Add R suffix to the device type
(e.g., TLC27L7CDR).
Copyright  1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

LinCMOS is a trademark of Texas Instruments Incorporated.
–800
Percentage of Units – %
V
IO
– Input Offset Voltage – µV
30
800
0
–400 0 400
5
10
15
20
25
DISTRIBUTION OF TLC27L7
INPUT OFFSET VOLTAGE
1
2
3
4
8
7
6
5
1OUT
1IN–
1IN+
GND
V
DD
2OUT
2IN–
2IN+
D, JG, OR P PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2OUT
NC
2IN–
NC
NC
1IN–
NC
1IN+
NC
FK PACKAGE
(TOP VIEW)
NC 1OUT NC
NC
NC
NC
GND
NC
NC – No internal connection
2IN +
DD
V
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
335 Units Tested From 2 Wafer Lots
V
DD
= 5 V
T
A
= 25°C
P Package