SPI Serial
Extended
Temperature
EEPROMs
8K (1024 x 8)
16K (2048 x 8)
32K (4096 x 8)
64K (8192 x 8)
AT25080A
AT25160A
AT25320A
AT25640A
5082B–SEEPR–1/05
Features
• Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
– Data Sheet Describes Mode 0 Operation
Medium-voltage and Standard-voltage Operation
– 2.7 (V
CC
= 2.7V to 5.5V)
Extended Temperature Range –40°C to 125°C
5.0 MHz Clock Rate
32-byte Page Mode
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software
Data Protection
Self-timed Write Cycle (2 ms [5V] typical)
High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC Packages and 8-lead TSSOP Packages
Description
The AT25080A/160A/320A/640A provides 8192/16384/32768/65536 bits of serial
electrically-erasable programmable read-only memory (EEPROM) organized as
1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many
automotive applications where low-power and low-voltage operation are essential.
The AT25080A/160A/320A/640A is available in space-saving 8-lead PDIP, 8-lead
JEDEC SOIC and 8-lead TSSOP packages.
The AT25080A/160A/320A/640A is enabled through the Chip Select pin (CS) and
accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data
Output (SO), and Serial Clock (SCK). All programming cycles are completely self-
timed, and no separate erase cycle is required before write.
Block write protection is enabled by programming the status register with one of four
blocks of write protection. Separate program enable and program disable instructions
are provided for additional data protection. Hardware data protection is provided via
the WP pin to protect against inadvertent write attempts to the status register. The
HOLD pin may be used to suspend any serial communication without resetting the
serial sequence.
Table 1. Pin Configurations
Pin Name Function
CS Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND Ground
VCC Power Supply
WP Write Protect
HOLD Suspends Serial Input
NC No Connect
DC Don’t Connect
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8-lead PDIP
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8-lead TSSOP
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8-lead SOIC
1