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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

AS4C256K16E0

器件描述:5V 256Kx16 CMOS DRAM (EDO)
厂商主页:http://www.alsc.com/
文件大小:644.84KB,共24页
Sponsor by e络盟
器件资料摘要:
Selection guide
Symbol AS4C256K1
0
Maximum RAS access time t
RAC
30
Maximum column address access time t
CAA
16
Maximum CAS access time t
CAC
10
Maximum output enable (OE) access time t
OEA
10
Minimum read or write cycle time t
RC
65
Minimum EDO page mode cycle time t
PC
12
Maximum operating current I
CC1
18
Maximum CMOS standby current I
CC2
2.
4/11/01; v.1.1 Alliance Semico
Shaded areas contain advance information.
6E0-30 AS4C256K16E0-35 AS4C256K16E0-50 Unit
35 50 ns
18 25 ns
10 10 ns
10 10 ns
70 85 ns
14 25 ns
0 160 140 mA
2.0 2.0 mA
Pin arrangement
40
39
38
37
36
35
34
33
32
31
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
A
S
4C
256
K
16E
0
SOJ
30
29
28
27
26
25
24
23
22
21
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
1
2
3
4
5
6
7
8
9
10
Vcc
I/O0
I/O1
I/O2
I/O3
Vcc
I/O4
I/O5
I/O6
I/O7
11
12
13
14
15
16
17
18
19
20
NC
NC
WE
RAS
NC
A0
A1
A2
A3
Vcc
V
CC
I/O0
I/O1
I/O2
I/O3
V
CC
I/O4
I/O5
I/O6
I/O7
NC
NC
WE
RAS
NC
A0
A1
A2
A3
V
CC
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A8
A7
A6
A5
A4
GND
44
43
42
41
40
39
38
37
36
35
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
13
14
15
16
17
18
19
20
21
22
TSOP II
A
S
4C
256
K
16E
0
Pin designation
Pin(s) Description
A0 to A8 Address inputs
RAS Row address strobe
I/O0 to I/O15 Input/output
OE Output enable
UCAS Column address strobe, upper byte
LCAS Column address strobe, lower byte
WE Read/write control
V
CC
Power (5V ± 0.5V)
GND Ground
®
AS4C256K16E0
5V 256K×16 CMOS DRAM (EDO)
Features
• Organization: 262,144 words × 16 bits
High speed
- 30/35/50 ns RAS access time
- 16/18/25 ns column address access time
- 7/10/10/10 ns CAS access time
Low power consumption
- Active: 500 mW max (AS4C256K16E0-25)
- Standby: 3.6 mW max, CMOS I/O (AS4C256K16E0-25)
EDO page mode
Refresh
- 512 refresh cycles, 8 ms refresh interval
-RAS-only or CAS-before-RAS refresh or self-refresh
- Self-refresh option is available for new generation device
only. Contact Alliance for more information.
Read-modify-write
TTL-compatible, three-state I/O
JEDEC standard packages
- 400 mil, 40-pin SOJ
- 400 mil, 40/44-pin TSOP II
5V power supply
Latch-up current > 200 mA
Copyright © Alliance Semiconductor. All rights reserved.
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