C0083C0078C0055C0052C0067C0066C0084C0049C0054C0050C0049C0048C0067
C0050C0048C0262C0066C0073C0084 C0070C0069C0084 C0066C0085C0083 C0083C0087C0073C0084C0067C0072
C0053C0262C0086 C0066C0085C0083 C0083C0087C0073C0084C0067C0072 C0087C0073C0084C0072 C0263C0050C0262C0086 C0085C0078C0068C0069C0082C0083C0072C0079C0079C0084 C0080C0082C0079C0084C0069C0067C0084C0073C0079C0078

SCDS115C − JANUARY 2003 − REVISED OCTOBER 2003
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Member of the Texas Instruments
Widebus Family
C0068 Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
C0068 Bidirectional Data Flow, With Near-Zero
Propagation Delay
C0068 Low ON-State Resistance (r
on
)
Characteristics (r
on
= 3 Ω Typical)
C0068 Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF)
= 5.5 pF Typical)
C0068 Data and Control Inputs Provide
Undershoot Clamp Diodes
C0068 Low Power Consumption
(I
CC
= 3 µA Max)
C0068 V
CC
Operating Range From 4 V to 5.5 V
C0068 Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
C0068 Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
C0068 I
off
Supports Partial-Power-Down Mode
Operation
C0068 Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
C0068 ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
C0068 Supports Both Digital and Analog
Applications: PCI Interface, Memory
Interleaving, Bus Isolation, Low-Distortion
Signal Gating
description/ordering information
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube SN74CBT16210CDL
CBT16210C
Tape and reel SN74CBT16210CDLR
−40°C to 85°C
TSSOP − DGG
Tube SN74CBT16210CDGG
CBT16210C
Tape and reel SN74CBT16210CDGGR
TVSOP − DGV Tape and reel SN74CBT16210CDGVR CY210C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.

Copyright  2003, Texas Instruments Incorporated
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
NC − No internal connection
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
V
CC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
C0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
C0080C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0110C0102C0111C0114C0109 C0116C0111 C0115C0112C0101C0099C0105C0102C0105C0099C0097C0116C0105C0111C0110C0115 C0112C0101C0114 C0116C0104C0101 C0116C0101C0114C0109C0115 C0111C0102 C0084C0101C0120C0097C0115 C0073C0110C0115C0116C0114C0117C0109C0101C0110C0116C0115
C0115C0116C0097C0110C0100C0097C0114C0100 C0119C0097C0114C0114C0097C0110C0116C0121C0046 C0080C0114C0111C0100C0117C0099C0116C0105C0111C0110 C0112C0114C0111C0099C0101C0115C0115C0105C0110C0103 C0100C0111C0101C0115 C0110C0111C0116 C0110C0101C0099C0101C0115C0115C0097C0114C0105C0108C0121 C0105C0110C0099C0108C0117C0100C0101
C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
Widebus is a trademark of Texas Instruments.