1/10July 2001
a73 HIGH SPEED:
t
PD
=5.8ns (TYP.) at V
CC
= 3.3V
a73 5V TOLERANT INPUTS
a73 POWER-DOWN PROTECTION ON INPUTS
a73 INPUT VOLTAGE LEVEL:
V
IL
= 0.8V, V
IH
= 2V at V
CC
=3V
a73 LOW POWER DISSIPATION:
I
CC
= 4 µA (MAX.) at T
A
=25°C
a73 LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
=3.3V
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4 mA (MIN) at V
CC
=3V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL

a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX257 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
It is composed of four independent 2-channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The 74LVX257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B"
data is chosen.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX257
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
(3-STATE) WITH 5V TOLERANT INPUTS

PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX257M 74LVX257MTR
TSSOP 74LVX257TTR
TSSOPSOP