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FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1A
3Y
2A
GND
VCC
1Y
3A
2Y
4
3
2
1
5
6
7
8
GND
2A
3Y
1A
2Y
3A
1Y
VCC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74LVC3GU04
TRIPLE INVERTER GATE
SCES539A – JANUARY 2004 – REVISED APRIL 2005
• Available in the Texas Instruments
NanoStar ™ and NanoFree ™ Packages
• Supports 5-V V CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t pd of 3.9 ns at 3.3 V
• Low Power Consumption, 10- µ A Max I CC
• ± 24-mA Output Drive at 3.3 V
• Typical V OLP (Output Ground Bounce)
< 0.8 V at V CC = 3.3 V, T A = 25 ° C
• Typical V OHV (Output V OH Undershoot)
> 2 V at V CC = 3.3 V, T A = 25 ° C
• Unbuffered Outputs
• Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This triple inverter is designed for 1.65-V to 5.5-V V CC operation.
The SN74LVC3GU04 contains three inverters with unbuffered outputs and performs the Boolean function Y = A .
NanoStar ™ and NanoFree ™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
T A PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING (2)
NanoStar ™ – WCSP (DSBGA) SN74LVC3GU04YEPR
0.23-mm Large Bump – YEP Reel of 3000 _ _ _CD_
NanoFree ™ – WCSP (DSBGA) SN74LVC3GU04YZPR
0.23-mm Large Bump – YZP (Pb-free)– 40 ° C to 85 ° C
SSOP – DCT Reel of 3000 SN74LVC3GU04DCTR CU4_ _ _
Reel of 3000 SN74LVC3GU04DCURVSSOP – DCU CU4_
Reel of 250 SN74LVC3GU04DCUT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, ⋅ = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Copyright © 2004 – 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.