AS4C1M16F5
24
25
27
26
A3
V
CC
A4
V
SS
170 160 mA
Selection guide
Symbol
Maximum RAS access time t
RAC
Maximum column address access time t
AA
Maximum CAS access time t
CAC
Maximum output enable (OE) access time t
OEA
Minimum read or write cycle time t
RC
Minimum fast page mode cycle time t
PC
Maximum operating current I
CC1
4/11/01; v.0.9.1 Alliance Semicondu
Maximum CMOS standby current I
CC5
AS4C1M16F5-50 AS4C1M16F5-60 Unit
50 60 ns
25 30 ns
13 17 ns
13 15 ns
84 104 ns
20 25 ns
Pin arrangement
42
41
40
39
38
37
36
35
34
33
V
SS
DQ16
DQ15
DQ14
DQ13
V
SS
DQ12
DQ11
DQ10
DQ9
SOJ
32
31
30
29
28
27
26
25
24
23
NC
LCAS
UCAS
OE
A9
A8
A6
A5
A4
V
SS
1
2
3
4
5
6
7
8
9
10
Vcc
DQ1
DQ2
DQ3
DQ4
Vcc
DQ5
DQ6
DQ7
DQ8
11
12
13
14
15
16
17
18
19
20
NC
NC
WE
RAS
NC
NC
A0
A1
A2
A3
2221Vcc
A7
V
CC
DQ1
DQ2
DQ
3
DQ4
V
CC
DQ5
DQ6
DQ7
DQ8
NC
NC
V
SS
DQ16
DQ15
DQ14
DQ13
V
SS
DQ12
DQ11
DQ10
DQ9
NC
NC
LCAS
UCAS
OE
50
49
48
47
46
45
44
43
42
41
40
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
20
21
22
TSOP II
23 28
NC
WE
RAS
NC
NC
A0
A1
A2
A9
A8
A7
A6
A5
Pin designation
Pin(s) Description
A0 to A9 Address inputs
RAS Row address strobe
DQ1 to DQ16 Input/output
OE Output enable
WE Write enable
UCAS Column address strobe, upper byte
LCAS Column address strobe, lower byte
V
CC
Power
V
SS
Ground
®
5V 1M×16 CMOS DRAM (fast-page mode)
Features
• Organization: 1,048,576 words × 16 bits
High speed
- 50/60 ns RAS access time
- 20/25 ns fast page cycle time
- 13/17 ns CAS access time
Low power consumption
- Active: 880 mW max (AS4C1M16E0-60)
- Standby: 11 mW max, CMOS DQ
Fast page mode
1024 refresh cycles, 16 ms refresh interval
- RAS-only or CAS-before-RAS refresh
Read-modify-write
TTL-compatible, three-state DQ
JEDEC standard package and pinout
- 400 mil, 42-pin SOJ
- 400 mil, 44/50-pin TSOP II
5V power supply
Industrial and commercial temperature available
Copyright © Alliance Semiconductor. All rights reserved.
ctor P. 1 of 21
2.0 2.0 mA