1/8April 2001
a73 HIGH SPEED: t
PD
= 4ns (TYP.) at V
CC
= 5V
a73 LOW POWER DISSIPATION:
I
CC
= 2µA(MAX.) at T
A
=25°C
a73 HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
a73 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL

a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
a73 PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC00 is an advanced high-speed CMOS
QUAD 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS tecnology.
The internal circuit is composed of 3 stages in-
cluding buffer output, which enables high noise
immunity and stable output.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
74AC00
QUAD 2-INPUT NAND GATE

PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP 74AC00B
SOP 74AC00M 74AC00MTR
TSSOP 74AC00TTR
TSSOPDIP SOP