5962-9677401QXA
器件描述:16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
文件大小:107.95KB,共11页
Sponsor by e络盟
器件资料摘要:
C0083C0078C0053C0052C0065C0066C0084C0049C0054C0050C0050C0052C0053C0044 C0083C0078C0055C0052C0065C0066C0084C0049C0054C0050C0050C0052C0053
C0049C0054C0262C0066C0073C0084 C0066C0085C0083 C0084C0082C0065C0078C0083C0067C0069C0073C0086C0069C0082C0083
C0087C0073C0084C0072 C0051C0262C0083C0084C0065C0084C0069 C0079C0085C0084C0080C0085C0084C0083
SCBS239F − MARCH 1993 − REVISED JUNE 2004
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Members of the Texas Instruments
Widebus Family
C0068 A-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
C0068 Typical V
OLP
(Output Ground Bounce)
<1 V at V
CC
= 5 V, T
A
= 25°C
C0068 Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
C0068 I
off
Supports Partial-Power-Down Mode
Operation
C0068 Flow-Through Architecture Optimizes PCB
Layout
C0068 Latch-Up Performance Exceeds 500 mA Per
JESD 17
C0068 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
The ’ABT162245 devices are 16-bit noninverting
3-state transceivers designed for synchronous
two-way communication between data buses.
The control-function implementation minimizes
external timing requirements.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so that the buses effectively are isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube SN74ABT162245DL
ABT162245
−40°C to 85°C
Tape and reel SN74ABT162245DLR
TSSOP − DGG Tape and reel SN74ABT162245DGGR ABT162245
−55°C to 125°C CFP − WD Tube SNJ54ABT162245WD SNJ54ABT162245WD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments IncorporatedC0080C0082C0079C0068C0085C0067C0084C0073C0079C0078 C0068C0065C0084C0065 C0105C0110C0102C0111C0114C0109C0097C0116C0105C0111C0110 C0105C0115 C0099C0117C0114C0114C0101C0110C0116 C0097C0115 C0111C0102 C0112C0117C0098C0108C0105C0099C0097C0116C0105C0111C0110 C0100C0097C0116C0101C0046
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C0116C0101C0115C0116C0105C0110C0103 C0111C0102 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115C0046
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
SN54ABT162245 . . . WD PACKAGE
SN74ABT162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
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1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
C0079C0110 C0112C0114C0111C0100C0117C0099C0116C0115 C0099C0111C0109C0112C0108C0105C0097C0110C0116 C0116C0111 C0077C0073C0076C0262C0080C0082C0070C0262C0051C0056C0053C0051C0053C0044 C0097C0108C0108 C0112C0097C0114C0097C0109C0101C0116C0101C0114C0115 C0097C0114C0101 C0116C0101C0115C0116C0101C0100
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