(TOP VIEW)
positive logic: Low input to clear resets Q low and
positive logic: Q high regardless of dc levels at A
positive logic: or B inputs.
C0049C0052 C0049C0051 C0049C0050 C0049C0049 C0049C0048 C0057
C0049 C0050 C0051 C0052 C0053 C0054 C0055
C0049C0054 C0049C0053
C0056
C0086
C0067C0067
C0049C0065
C0049 C0082
C0101C0120C0116C0047
C0067
C0101C0120C0116
C0049
C0067
C0101C0120C0116
C0049C0081 C0050C0081 C0050C0066
C0050
C0067C0076C0082 C0050C0065
C0049C0066 C0049
C0067C0076C0082
C0049C0081 C0050C0081 C0050
C0067
C0101C0120C0116
C0050 C0082
C0101C0120C0116
C0047
C0067
C0101C0120C0116
C0071C0078C0068
C0081
C0081
C0067C0076C0082
C0081
C0081
C0067C0076C0082
C0043
C0086
C0067C0067
C0082
C0101C0120C0116
C0082C0047C0067C0067
C0101C0120C0116
*See operational notes — Pulse Trigger Modes
5-380
FAST AND LS TTL DATA
DUAL MONOSTABLE
MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS
Each multivibrator of the LS221 features a negative-transition-triggered
input and a positive-transition-triggered input either of which can be used as
an inhibit input.
Pulse triggering occurs at a voltage level and is not related to the transition
time of the input pulse. Schmitt-trigger input circuitry for B input allows
jitter-free triggering for inputs as slow as 1 volt/second, providing the circuit
with excellent noise immunity. A high immunity to V
CC
noise is also provided
by internal latching circuitry.
Once triggered, the outputs are independent of further transitions of the
inputs and are a function of the timing components. The output pulses can be
terminated by the overriding clear. Input pulse width may be of any duration
relative to the output pulse width. Output pulse width may be varied from 35
nanoseconds to a maximum of 70 s by choosing appropriate timing
components. With R
ext
= 2.0 kΩ and C
ext
= 0, a typical output pulse of 30
nanoseconds is achieved. Output rise and fall times are independent of pulse
length.
Pulse width stability is achieved through internal compensation and is
virtually independent of V
CC
and temperature. In most applications, pulse
stability will only be limited by the accuracy of external timing components.
Jitter-free operation is maintained over the full temperature and V
CC
ranges
for greater than six decades of timing capacitance (10 pF to 10 µF), and
greater than one decade of timing resistance (2.0 to 70 kΩ for the
SN54LS221, and 2.0 to 100 kΩ for the SN74LS221). Pulse width is defined
by the relationship: t
w
(out) = C
ext
R
ext
ln 2.0 ≈n6368617200000000000000000.7 C
ext
R
ext
; where t
W
is in ns
if C
ext
is in pF and R
ext
is in kΩ. If pulse cutoff is not critical, capacitance up
to 1000 µF and resistance as low as 1.4 kΩ may be used. The range of
jitter-free pulse widths is extended if V
CC
is 5.0 V and 25°C temperature.
• SN54LS221 and SN74LS221 is a Dual Highly Stable One-Shot
• Overriding Clear Terminates Output Pulse
• Pin Out is Identical to SN54/74LS123
FUNCTION TABLE
(EACH MONOSTABLE)
INPUTS OUTPUTS
CLEAR A B Q Q
L X X L H
X H X L H
X X L L H
H L C0176
H C0177 H
*C0176 L H
TYPE
TYPICAL
POWER
MAXIMUM
OUTPUT PULSE
DISSIPATION LENGTH
SN54LS221 23 mW 49 s
SN74LS221 23 mW 70 s
SN54/74LS221
DUAL MONOSTABLE
MULTIVIBRATORS
WITH SCHMITT-TRIGGER INPUTS
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03