1Motorola TMOS Power MOSFET Transistor Device Data
C0068C0101C0115C0105C0103C0110C0101C0114C0039C0115 C0068C0097C0116C0097 C0083C0104C0101C0101C0116
C0072C0068C0084C0077C0079C0083 C0069C0045C0070C0069C0084C0046
C0072C0105C0103C0104 C0068C0101C0110C0115C0105C0116C0121 C0080C0111C0119C0101C0114 C0070C0069C0084
C0068C0080C0065C0075 C0102C0111C0114 C0083C0117C0114C0102C0097C0099C0101 C0077C0111C0117C0110C0116
N–Channel Enhancement–Mode Silicon Gate
This advanced HDTMOS power FET is designed to withstand
high energy in the avalanche and commutation modes. This new
energy efficient design also offers a drain–to–source diode with a
fast recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Dis-
crete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
• Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS (T
C
= 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain–Source Voltage V
DSS
30 Vdc
Drain–Gate Voltage (R
GS
= 1.0 MΩ) V
DGR
30 Vdc
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (t
p
≤ 10 ms)
V
GS
V
GSM
±15
± 20
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (t
p
≤ 10 µs)
I
D
I
D
I
DM
20
16
60
Adc
Apk
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T
C
= 25°C, when mounted with the minimum recommended pad size
P
D
74
0.6
1.75
Watts
W/°C
Operating and Storage Temperature Range T
J
, T
stg
–55 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting T
J
= 25°C
(V
DD
= 25 Vdc, V
GS
= 5.0 Vdc, Peak I
L
= 20 Apk, L = 1.0 mH, R
G
= 25 Ω)
E
AS
200 mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size
R
θJC
R
θJA
R
θJA
1.67
100
71.4
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, E–FET, and HDTMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Order this document
by MTD20N03HDL/D
C0077C0079C0084C0079C0082C0079C0076C0065
SEMICONDUCTOR TECHNICAL DATA
 Motorola, Inc. 1995
C0077C0084C0068C0050C0048C0078C0048C0051C0072C0068C0076
TMOS POWER FET
LOGIC LEVEL
20 AMPERES
30 VOLTS
R
DS(on)
= 0.035 OHM
Motorola Preferred Device

D
S
G
CASE 369A–13, Style 2
DPAK