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厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

24C05LN

器件描述:4K-Bit Standard 2-Wire Bus Interface Serial EEPROM
器件厂商:FAIRCHILD [Fairchild Semiconductor]
文件大小:104.73KB,共14页
Sponsor by e络盟
器件资料摘要:
1 www.fairchildsemi.com
NM24C04/05 Rev. G
NM24C04/05 – 4K-Bit Standard 2-Wire Bus Interface Serial EEPROM
February 2000
© 1998 Fairchild Semiconductor Corporation
NM24C04/05 – 4K-Bit Standard 2-Wire Bus
Interface Serial EEPROM
General Description
The NM24C04/05 devices are 4096 bits of CMOS non-volatile
electrically erasable memory. These devices conform to all speci-
fications in the Standard IIC 2-wire protocol and are designed to
minimize device pin count, and simplify PC board layout require-
ments.
The upper half (upper 2Kbit) of the memory of the NM24C05 can be
write protected by connecting the WP pin to V
CC
. This section of
memory then becomes unalterable unless WP is switched to V
SS
.
This communications protocol uses CLOCK (SCL) and DATA
I/O (SDA) lines to synchronously clock data between the master
(for example a microprocessor) and the slave EEPROM device(s).
The Standard IIC protocol allows for a maximum of 16K of
EEPROM memory which is supported by the Fairchild family in
2K, 4K, 8K, and 16K devices, allowing the user to configure the
memory as the application requires with any combination of
EEPROMs. In order to implement higher EEPROM memory
densities on the IIC bus, the Extended IIC protocol must be used.
(Refer to the NM24C32 or NM24C65 datasheets for more infor-
mation.)
Fairchild EEPROMs are designed and tested for applications requir-
ing high endurance, high reliability and low power consumption.
Block Diagram
Features
a73 Extended operating voltage 2.7V – 5.5V
a73 400 KHz clock frequency (F) at 2.7V - 5.5V
a73 200µA active current typical
10µA standby current typical
1µA standby current typical (L)
0.1µA standby current typical (LZ)
a73 IIC compatible interface
– Provides bi-directional data transfer protocol
a73 Schmitt trigger inputs
a73 Sixteen byte page write mode
– Minimizes total write time per byte
a73 Self timed write cycle
Typical write cycle time of 6ms
a73 Hardware Write Protect for upper half (NM24C05 only)
a73 Endurance: 1,000,000 data changes
a73 Data retention greater than 40 years
a73 Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP
a73 Available in three temperature ranges
- Commercial: 0° to +70°C
- Extended (E): -40° to +85C
- Automotive (V): -40° to +125°C
H.V. GENERATION
TIMING &CONTROL
E
2
PROM
ARRAY
YDEC
DATA REGISTER
XDEC
CONTROL
LOGIC
WORD
ADDRESS
COUNTER
SLAVE ADDRESS
REGISTER &
COMPARATOR
START
STOP
LOGIC
CK
D
IN
R/W
SDA
SCL
V
SS
WP
V
CC
D
OUT
A2
A1
DS500070-1