SN74LVC126A
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS

SCAS339H – MARCH 1994 – REVISED OCTOBER 1998
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
C0068 ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
C0068 Latch-Up Performance Exceeds 250 mA Per
JESD 17
C0068 Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25°C
C0068 Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25°C
C0068 Inputs Accept Voltages to 5.5 V
C0068 Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages
description
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74LVC126A features independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of
the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN74LVC126A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE A
Y
H H H
H LL
LXZ
Copyright  1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3OE
3A
3Y
D, DB, DGV, OR PW PACKAGE
(TOP VIEW)