Philips Semiconductors Product specification
PowerMOS transistor BUK117-50DL
Logic level TOPFET
DESCRIPTION QUICK REFERENCE DATA
Monolithic temperature and SYMBOL PARAMETER MAX. UNIT
overload protected logic level power
MOSFET in TOPFET2 technology V
DS
Continuous drain source voltage 50 V
assembled in a 3 pin plastic I
D
Continuous drain current 8 A
package. P
D
Total power dissipation 40 W
T
j
Continuous junction temperature 150 ˚C
APPLICATIONS R
DS(ON)
Drain-source on-state resistance 100 mΩ
General purpose switch for driving I
ISL
Input supply current V
IS
= 5 V 650 µA
lamps
motors
solenoids
heaters
in automotive systems and other
applications.
FEATURES FUNCTIONAL BLOCK DIAGRAM
TrenchMOS output stage
Current limiting
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage and
supply of overload protection
circuits derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
Fig.1. Elements of the TOPFET.
PINNING - SOT78B PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 input
2 drain
3 source
tab drain
DRAIN
SOURCE
INPUT
RIG
LOGIC AND
PROTECTION
O / V
CLAMP
POWER
MOSFET
123
MBL292Front view
mb mb
P
D
S
I
TOPFET
May 2001 1 Rev 1.800