74V2T241
器件描述:DUAL BUS BUFFER NON INVERTED (3-STATE)
文件大小:152.94KB,共8页
Sponsor by e络盟
器件资料摘要:
1/8June 2003
a73 HIGH SPEED: t
PD
= 3.8ns (TYP.) at V
CC
=5V
a73 LOW POWER DISSIPATION:
I
CC
=1µA(MAX.) at T
A
=25°C
a73 POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
a73 COMPATIBLE WITH TTL LEVEL:
V
IH
=2.0V(MIN), V
IL
=0.8V(MAX)
a73 SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
=8mA(MIN)atV
CC
=4.5V
a73 BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
a73 OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
a73 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T241 is an advanced high-speed CMOS
DUAL BUS BUFFER NON INVERTER fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
It has one active-high and one active-low output
enable. Power down protection is provided on all
inputs and outputs and 0 to 7V can be accepted
on inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
74V2T241
DUAL BUS BUFFER NON INVERTED (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE T & R
SOT23-8L 74V2T241STR
SOT23-8L